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參數(shù)資料
| 型號(hào)： | PHK5NQ10T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel TrenchMOS transistor |
| 中文描述： | 5 A, 100 V, 0.05 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | PHK5NQ10T |
Philips Semiconductors
Product specification
N-channel TrenchMOS
TM
transistor
PHK5NQ10T
FEATURES
SYMBOL
QUICK REFERENCE DATA
Low on-state resistance
Fast switching
Low profile surface mount
package
V
DS
= 100 V
I
D
= 5 A
R
DS(ON)
≤
50 m
(V
GS
= 10 V)
GENERAL DESCRIPTION
PINNING
SOT96-1 (SO8)
N-channel
field-effect transistor in a plastic
envelope
using
technology.
enhancement
mode
PIN
DESCRIPTION
’
trench
’
1-3
source
4
gate
Applications:-
Motor and relay drivers
d.c. to d.c. converters
5-8
drain
The PHK5NQ10T is supplied in the
SOT96-1 (SO8) surface mounting
package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DSS
V
DGR
PARAMETER
Drain-source voltage
Drain-gate voltage
CONDITIONS
T
j
= 25 C to 150C
T
j
= 25 C to 150C;
R
GS
= 20 k
MIN.
-
-
MAX.
100
100
UNIT
V
V
V
GS
I
D
Gate-source voltage
Drain current (t
p
≤
10 s)
-
-
-
-
-
-
±
20
5
3.6
20
2.5
1.6
150
V
A
A
A
W
W
C
T
a
= 25 C
T
a
= 70 C
T
a
= 25 C
T
a
= 25 C, t
≤
10 s
T
a
= 70 C, t
≤
10 s
I
DM
P
tot
Drain current (pulse peak value)
Total power dissipation
T
j
, T
stg
Operating junction and storage
temperature
- 65
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-a
Thermal resistance junction
to ambient
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t
≤
10 sec
TYP.
-
MAX.
50
UNIT
K/W
Surface mounted, FR4 board
150
-
K/W
d
g
s
1
2
3
4
5
6
7
8
pin 1 index
August 1999
1
Rev 1.000
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參數(shù)描述 |
|---|---|
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