參數(shù)資料
型號(hào)： PC28F256J3C-150
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲(chǔ)器（J3）
文件頁(yè)數(shù)： 45/72頁(yè)
文件大?。?/td> 905K
代理商： PC28F256J3C-150
256-Mbit J3 (x8/x16)
Datasheet
45
The only other valid commands while block erase is suspended are Read Query, Read Status
Register, Clear Status Register, Configure, and Block Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM will continue the block erase process. SR.6 and
SR.7 will automatically clear and STS (in default mode) will return to V
OL
. After the Erase
Resume command is written, the device automatically outputs SRD when read (see
Figure 23,
“Block Erase Suspend/Resume Flowchart” on page 64
). V
PEN
must remain at V
PENH
(the same
V
PEN
level used for block erase) while block erase is suspended. Block erase cannot resume until
program operations initiated during block erase suspend have completed.
12.3
Erase Resume
To resume (i.e., continue) an erase suspend operation, execute the Erase Resume command. The
Resume command can be written to any device address. When a program operation is nested
within an erase suspend operation and the Program Suspend command is issued, the device will
suspend the program operation. When the Resume command is issued, the device will resume the
program operations first. Once the nested program operation is completed, an additional Resume
command is required to complete the block erase operation. The device supports a maximum
suspend/resume of two nested routines. See
Figure 22, “Block Erase Flowchart” on page 63
.
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PC28F256J3D95B 功能描述:IC FLASH 256MBIT 95NS 64EZBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
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