參數資料
型號： PC28F256J3C-110
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲器（J3）
文件頁數： 66/72頁
文件大小： 905K
代理商： PC28F256J3C-110
256-Mbit J3 (x8/x16)
66
Datasheet
Figure 25. Clear Lock-Bit Flowchart
Start
Write 60H
Write D0H
Read Status Register
SR.7 =
Full Status
Check if Desired
Clear Block Lock-Bits
Complete
FULL STATUS CHECK PROCEDURE
Bus
Operation
Write
Write
Standby
Write FFH after the clear lock-bits operation to place device in read
array mode.
Bus
Operation
Standby
SR.5, SR.4, and SR.3 are only cleared by the Clear Status Register
command.
If an error is detected, clear the status register before attempting retry
or other error recovery.
1
0
Command
Clear Block
Lock-Bits Setup
Clear Block or
Lock-Bits Confirm
Comments
Data = 60H
Addr = X
Data = D0H
Addr = X
Check SR.7
1 = WSM Ready
0 = WSM Busy
Command
Comments
Check SR.3
1 = Programming Voltage Error
Detect
Read Status Register
Data (See Above)
Voltage Range Error
SR.3 =
1
0
Command Sequence
Error
SR.4,5 =
1
0
Clear Block Lock-Bits
Error
SR.5 =
1
0
Read
Status Register Data
Standby
Check SR.4, 5
Both 1 = Command Sequence
Error
Standby
Check SR.5
1 = Clear Block Lock-Bits Error
Clear Block Lock-Bits
Successful
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