參數(shù)資料
型號(hào)： PC28F256J3C-110
廠商： Intel Corp.
英文描述： Intel StrataFlash Memory (J3)
中文描述： 英特爾StrataFlash存儲(chǔ)器（J3）
文件頁(yè)數(shù)： 53/72頁(yè)
文件大?。?/td> 905K
代理商： PC28F256J3C-110
256-Mbit J3 (x8/x16)
Datasheet
53
A.2
Query Structure Overview
The Query command causes the flash component to display the Common Flash Interface (CFI)
Query structure or “database.” The structure sub-sections and address locations are summarized
below. See
AP-646 Common Flash Interface (CFI) and Command Sets
(order number 292204) for
a full description of CFI commands.
The following sections describe the Query structure sub-sections in detail.
Table 23. Summary of Query Structure Output as a Function of Device and Mode
Device
Type/
Mode
Query start location in
maximum device bus
width addresses
Query data with maximum
device bus width addressing
Query data with byte
addressing
Hex
Offset
10:
11:
12:
Hex
Code
0051
0052
0059
ASCII
Value
“Q”
“R”
“Y”
Hex
Offset
20:
21:
22:
20:
21:
22:
Hex
Code
51
00
52
51
51
52
ASCII
Value
“Q”
“Null”
“R”
“Q”
“Q”
“R”
x16 device
x16 mode
10h
x16 device
x8 mode
N/A
(1)
N/A
(1)
NOTE:
1. The system must drive the lowest order addresses to access all the device's array data when the device is
configured in x8 mode. Therefore, word addressing, where these lower addresses are not toggled by the
system, is "Not Applicable" for x8-configured devices.
Table 24. Example of Query Structure Output of a x16- and x8-Capable Device
Word Addressing
Byte Addressing
Offset
Hex Code
Value
Offset
Hex Code
Value
A
15
–A
0
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
...
D15–D
0
A
7
–A
0
20h
21h
22h
23h
24h
25h
26h
27h
28h
...
D
7
–D
0
0051
0052
0059
P_ID
LO
P_ID
HI
P
LO
P
HI
A_ID
LO
A_ID
HI
...
“Q”
“R”
“Y”
51
51
52
52
59
59
“Q”
“Q”
“R”
“R”
“Y”
“Y”
PrVendor
ID #
PrVendor
TblAdr
AltVendor
ID #
...
P_ID
LO
P_ID
LO
P_ID
HI
...
PrVendor
ID #
ID #
...
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