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參數(shù)資料
| 型號： | PA28F002BC-T80 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY |
| 中文描述： | 256K X 8 FLASH 12V PROM, 80 ns, PDSO44 |
| 封裝： | 0.525 X 1.110 INCH, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 12/37頁 |
| 文件大?。?/td> | 455K |
| 代理商： | PA28F002BC-T80 |
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28F002BC 2-MBIT BOOT BLOCK FLASH MEMORY
E
12
PRELIMINARY
2.1
Memory Organization
2.1.1
BLOCKING
The 28F002BC features an asymmetrically-blocked
architecture
that
provides
integration. Each block can be erased up to
100,000 times. The block sizes have been chosen
to
optimize
their
functionality
applications of nonvolatile storage. For the address
locations of the blocks, see the memory map in
Figure 6.
system
memory
for
common
2.1.1.1
Boot Block - 16 KB
The boot block is intended to replace a dedicated
boot PROM in a microprocessor or microcontroller-
based system. The 16-Kbyte (16,384 bytes) boot
block is located at the top of the address map as
shown in Figure 6. This boot block features
hardware controllable write-protection to protect the
crucial microprocessor boot code from accidental
erasure. The boot block can be erased and written
when RP# is held at 12V for the duration of the
erase or program operation. This feature allows
customers to change the boot code when
necessary while providing security at other times.
28F002BC-T
128-Kbyte Main Block
8-Kbyte Parameter Block
16-Kbyte Boot Block
8-Kbyte Parameter Block
96-Kbyte Main Block
00000H
1FFFFH
20000H
37FFFH
38000H
3A000H
3BFFFH
3C000H
3FFFFH
0578_05
Figure 6. 28F002BC-T Memory Map
2.1.1.2
Parameter Blocks - 8 KB (each)
The 28F002BC has two 8-Kbyte parameter blocks
to facilitate storage of frequently updated system
parameters that would normally require an
EEPROM. The parameter blocks can also be used
to store additional boot or main code. By using
software techniques, the byte-rewrite functionality
of EEPROMs can be emulated. These techniques
are detailed in Intel’s application note
AP-604 Using
Intel’s Boot Block Flash Memory Parameter Blocks
to Replace EEPROM.
2.1.1.3
Main Block - 96 KB and 128 KB
The 28F002BC contains one 96-Kbyte (98,304
byte) block and one 128-Kbyte (131,072 byte)
block. These blocks are typically used for data or
code storage.
2.1.2
28F002BC-T BLOCK MEMORY MAP
The 16-Kbyte boot block of the 28F002BC-T is
located from 3C000H to 3FFFFH.
The first 8-Kbyte
parameter block resides in memory space from
3A000H
to
3BFFFH.
parameter block consumes the memory area from
38000H to 39FFFH. The 96-Kbyte main block
extends from 20000H to 37FFFH, while the
128-Kbyte main block occupies the region from
00000H to 1FFFFH.
The
second
8-Kbyte
3.0
PRINCIPLES OF OPERATION
Flash memory improves upon EPROM capability
with in-circuit electrical write and erase. The Boot
Block flash memory utilizes a Command User
Interface (CUI) and automated algorithms to
simplify write and erase operations. The CUI allows
for 100% TTL-level control inputs, fixed power
supplies during erasure and programming, and
maximum EPROM compatibility.
When V
PP
< V
PPLK
, the device will only successfully
execute the following commands: Read Array,
Read Status register, Clear Status register, and
Intelligent Identifier. The device provides standard
EPROM
read,
standby
operations. Manufacturer identification and device
identification data can be accessed through the CUI
or through the standard EPROM A
9
high voltage
(V
ID
) access for PROM programming equipment.
High voltage on V
PP
allows write and erase of the
device. With V
PP
active, all functions associated
and
output
disable
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