參數(shù)資料
型號(hào)： P95020ZNQGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： QFN-132
文件頁(yè)數(shù)： 69/137頁(yè)
文件大小： 3533K
代理商： P95020ZNQGI
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P95020 / Preliminary Datasheet
Revision 0.7.10
37
2010 Integrated Device Technology, Inc.
2.13.13 AUDIO CLASS_D - VOLUME0/1 Register
There is one 8-bit Channel Volume Control Register for each channel. Each bit represents 0.5 dB of gain or attenuation
to be applied to the channel. The range is from -91 dB to + 36 dB.
Left Channel (0) = IC Address = Page-2: 40(0x28), C Address = 0xA228
Bit
Bit Name
Default
Settings
User
Type
Value
Description / Comments
[7:0]
Volume0
48h
RW
00h = +36.0 dB
01h = +35.5 dB
...
47h = +0.5 dB
48h = +0 dB
49h = -0.5 dB
...
FEh = -91 dB
FFh = Hard Channel
Mute
Channel 0 Volume
Right Channel (1) = IC Address = Page-2: 41(0x29), C Address = 0xA229
Bit
Bit Name
Default
Settings
User
Type
Value
Description / Comments
[7:0]
Volume1
48h
RW
00h = +36.0 dB
01h = +35.5 dB
...
47h = +0.5 dB
48h = +0 dB
49h = -0.5 dB
...
FEh = -91 dB
FFh = Hard Channel
Mute
Channel 1 Volume
2.13.14 AUDIO CLASS_D
–LMTHOLDTIME Register
Controls operation of the Volume Limiter (Compressor) Hold Time.
LMTHOLDTIME: IC Address = Page-2: 42 (0x2A), C Address = 0xA22A
Bit
Bit Name
Default
Settings
User
Type
Value
Description / Comments
[6:0]
time
0000000b
RW
Timer value in units of 1 ms or 10 ms.
7
time10ms
0b
RW
0 = value in bits [6:0]
is in 1 ms units
1 = value in bits [6:0]
is in 10 ms units
1 = value in bits 6:0 is in 10ms units, otherwise 1ms units.
2.13.15 AUDIO CLASS_D
– LMTATKTH & LMTRELTH Registers
These 16-bit registers set the threshold values. When in attack phase and the Attack Threshold is exceeded the
Compressor attenuation
is incremented by stepsize (see LMTCTRL). When in release phase and the Release Threshold
is not exceeded, the Compressor attenuation is incremented by stepsize (but not above 0).
LMTATKTH_HI: IC Address = Page-2: 43(0x2B), C Address = 0xA22B
LMTATKTH_LO: IC Address = Page-2: 44(0x2C), C Address = 0xA22C
LMTRELTH_HI: IC Address = Page-2: 45(0x2D), C Address = 0xA22D
LMTRELTH_LO: IC Address = Page-2: 46(0x2E), C Address = 0xA22E
Bit
Bit Name
Default
Settings
User
Type
Value
Description / Comments
[7:0 ]
threshold[7:0]
00h
RW
Always 0. It usually isnt necessary to provide threshold resolution to
the point where these lower 8 bits would be used.
[15:8 ]
threshold[15:8]
00h
RW
FFh would equal threshold level of +2.0dB. Each step below this
8 bit full scale value reduces threshold level by 0.0078 dB.
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