參數(shù)資料
型號(hào)： P95020ZNQG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： QFN-132
文件頁(yè)數(shù)： 33/137頁(yè)
文件大?。?/td> 3533K
代理商： P95020ZNQG
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P95020 / Preliminary Datasheet
Revision 0.7.10
128
2010 Integrated Device Technology, Inc.
16.6.2
LDO_150 AND LDO_050
– CONTROL REGISTERS
The Control Registers contains bits for setting the Current Limit.
LDO_150_0 = IC Address = Page-0: 97(0x61), C Address = 0xA061
LDO_150_1 = IC Address = Page-0: 99(0x63), C Address = 0xA063
LDO_150_2 = IC Address = Page-0: 101(0x65), C Address = 0xA065
LDO_050_0 = IC Address = Page-0: 103(0x67), C Address = 0xA067
LDO_050_1 = IC Address = Page-0: 105(0x69), C Address = 0xA069
LDO_050_2 = IC Address = Page-0: 107(0x6B), C Address = 0xA06B
LDO_050_3 = IC Address = Page-0: 109(0x6D), C Address = 0xA06D
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[1:0]
I_LIM
00b
RW
Current Limit (%)
[7:2]
RESERVED
000000b
RW
RESERVED
Table 31
– Control Register Current Limit (I_LIM) Settings for Bits [1:0]
Bit 3
Bit 2
Description
0
Current Limit = 120 % of Rating
0
1
Current Limit = 90 % of Rating
1
0
Current Limit = 60 % of Rating
1
Current Limit = 30 % of Rating
Note
– Current Limit is at maximum when bits [1:0] are both set to 0.
16.6.3
VDD_AUDIO18 LDO REGISTER
The VDD_AUDIO18 Register contains the enable bit and the output voltage bit.
IC Address = Page-0: 110(0x6E), C Address = 0xA06E
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
SEL_15V
0b
RW
0 = 1.8 V
1 = 1.5 V
Select VDD_Audio18 Output Voltage (1.8V or 1.5V)
[6:1]
RESERVED
000000b
RW
RESERVED
7
EN_AUDIO18
0b
RW
0 = Not Enabled
1 = Enabled
Enable VDD_AUDIO18 LDO
16.6.4
VDD_AUDIO33 LDO REGISTER
The VDD_AUDIO33 Voltage Register contains the enable bit and the output voltage bits.
IC Address = Page-0: 111(0x6F), C Address = 0xA06F
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[6:0]
VOUT
1100110b
RW
Output Voltage =
VOUT * 25 mV +
750 mV
Default = 3.3 V. Performance and accuracy are not guaranteed with bit
combinations above 1110110 (3.7V).
7
EN_AUDIO33
0b
RW
0 = Disable
1 = Enable
Enable Audio_33 LDO
16.6.5
EXTERNAL LDO POWER GOOD REGISTER
The LDO_STATUS1 Register contains the power good bits for the LDO_150 and LDO_050 LDOs.
IC Address = Page-0: 112(0x70), C Address = 0xA070
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
LDO_150_0_PG
N/A
R
0 = Power NOT
Good
1 = Power IS Good
Power Good Status for LDO_150_0
1
LDO_150_1_PG
N/A
R
Power Good Status for LDO_150_1
2
LDO_150_2_PG
N/A
R
Power Good Status for LDO_150_2
3
LDO_050_0_PG
N/A
R
Power Good Status for LDO_050_0
4
LDO_050_1_PG
N/A
R
Power Good Status for LDO_050_1
5
LDO_050_2_PG
N/A
R
Power Good Status for LDO_050_2
6
LDO_050_3_PG
N/A
R
Power Good Status for LDO_050_3
7
RESERVED
0b
R
RESERVED
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