參數(shù)資料
型號(hào)： P95020ZNQG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： QFN-132
文件頁(yè)數(shù)： 28/137頁(yè)
文件大?。?/td> 3533K
代理商： P95020ZNQG
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P95020 / Preliminary Datasheet
Revision 0.7.10
123
2010 Integrated Device Technology, Inc.
15.8 ACCM REGISTERS
INT_DIR CONFIGURATION: IC Address = Page-0: 16(0x10), C Address = 0xA010
IC Address = Page-0: 17(0x11), C Address = 0xA011
IC Address = Page-0: 18(0x12), C Address = 0xA012
IC Address = Page-0: 19(0x13), C Address = 0xA013
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[31:0]
INT_DIR
FFFF77FFh
RW
Please refer to
above.
Interrupt direction (
“1” map to internal processor).
EXT_INT_DATA_IN: IC Address = Page-0: 20(0x14), C Address = 0xA014
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[7:0]
EXT_INT_DATA
00h
RW
External processor generated interrupt associated data. External
processor write to this register will set EXT_INT_STATUS bit.
EXT_INT_STATUS_IN: IC Address = Page-0: 21(0x15), C Address = 0xA015
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
EXT_INT_STATUS
0b
RW1C
0 = Normal operation
1 = Interrupt
External processor interrupt status
[7:1]
RESERVED
0000000b
RW
RESERVED
INT_INT_DATA_IN: IC Address = Page-0: 22(0x16), C Address = 0xA016
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[7:0]
INT_INT_DATA
00h
RW
Internal processor generated interrupt associated data. Internal
processor write to this register will set INT_INT_STATUS bit
INT_INT_STATUS_IN: IC Address = Page-0: 23(0x17), C Address = 0xA017
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
0
INT_INT_STATUS
0b
RW1C
0 = Normal operation
1= Interrupt
Internal processor interrupt status
[7:1]
RESERVED
00h
RW
RESERVED
UP_CONTEXT: IC Address = Page-0: 24(0x18), C Address = 0xA018
IC Address = Page-0: 25(0x19), C Address = 0xA019
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[15:0]
UP_CONTEXT
0000h
RW
Reserved for Processor context
DATA_BUF: IC Address = Page-0: 26(0x1A), C Address = 0xA01A
IC Address = Page-0: 27(0x1B), C Address = 0xA01B
IC Address = Page-0: 28(0x1C), C Address = 0xA01C
IC Address = Page-0: 29(0x1D), C Address = 0xA01D
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[31:0]
DAT_BUF
00000000h
RW
Can be read or write by internal or external processor, this
register is for interprocessor communication.
CHIP_OPTIONS: IC Address = Page-0: 30(0x1E), C Address = 0xA01E
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[1:0]
RESERVED
00b
R
RESERVED
[3:2]
RESERVED
00b
R
RESERVED
4
EX_ROM
0b
R
EX_ROM pin value
5
RESERVED
0b
R
RESERVED
[7:6]
CHIP_OPT
00b
R
Chip metal option (metal changeable bit in metal fixed version)
DEV_REV: IC Address = Page-0: 31(0x1F), C Address = 0xA01F
Bit
Bit Name
Def.
Set.
User
Type
Value
Description / Comments
[7:0]
DEV_REV
00h
R
Device revision
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