參數(shù)資料
型號(hào)： P8xC592
廠商： NXP Semiconductors N.V.
英文描述： 8-bit microcontroller with on-chip CAN
中文描述： 8位微控制器芯片的CAN
文件頁(yè)數(shù)： 54/108頁(yè)
文件大?。?/td> 650K
代理商： P8XC592
1996 Jun 27
54
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xC592
13.5.20.1 Synchronization Rules
The synchronization rules are as follows:
Only one synchronization within one bit time is used.
An edge is used for synchronization only if the value
detected at the previous sample point differs from the
bus value immediately after the edge.
Hard synchronization is performed whenever there is a
recessive-to-dominant edge during Bus-Idle
(see Section 13.6.6).
All other edges (recessive-to-dominant and optionally
dominant-to recessive edges if the Sync bit is set HIGH
(see Section 13.5.3) which are candidates for
resynchronization will be used with the following
exception:
– A transmitting CAN-controller will not perform a
resynchronization as a result of a
recessive-to-dominant edge with positive phase
error, if only these edges are used for
resynchronization. This ensures that the delay times
of the output driver and input comparator do not
cause a permanent increase in the bit time.
13.6
CAN 2.0A Protocol description
13.6.1
F
RAME TYPES
The P8xC592's CAN-controller supports the four different
CAN-protocol frame types for communication:
Data Frame, to transfer data
Remote Frame, request for data
Error Frame, globally signal a (locally) detected error
condition
Overload Frame, to extend delay time of subsequent
frames (an Overload Frame is not initiated by the
P8xC592 CAN-controller).
13.6.1.1
Bit representation
There are two logical bit representations used in the
CAN-protocol:
A recessive bit on the bus-line appears only if all
connected CAN-controllers send a recessive bit at that
moment.
Dominant bits always overwrite recessive bits i.e. the
resulting bit level on the bus-line is dominant.
13.6.2
D
ATA
F
RAME
A Data Frame carries data from a transmitting
CAN-controller to one or more receiving ones.
A Data Frame is composed of seven different bit-fields:
Start-Of-Frame
Arbitration Field
Control Field
Data Field (may have a length of zero)
CRC Field (CRC = Cyclic Redundancy Code)
Acknowledge Field
End-Of-Frame.
13.6.2.1
Start-Of-Frame bit
Signals the start of a Data Frame or Remote Frame.
It consists of a single dominant bit use for hard
synchronization of a CAN-controller in receive mode.
13.6.2.2
Arbitration Field
Consists of the message Identifier and the RTR bit. In the
case of simultaneous message transmissions by two or
more CAN-controllers the bus access conflict is solved by
bit-wise arbitration, which is active during the transmission
of the Arbitration Field.
13.6.2.3
Identifier
This 11-bit field is used to provide information about the
message, as well as the bus access priority. It is
transmitted in the order ID.10 to ID.0 (LSB). The situation
that the seven most significant bits (ID.10 to ID.4) are all
recessive must not occur.
An Identifier does not define which particular
CAN-controller will receive the frame because a CAN
based communication network does not differentiate
between a point-to-point, multicast or broadcast
communication.
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