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參數(shù)資料
| 型號： | P8XC557E8 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 BIT MICROCONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 68/84頁 |
| 文件大?。?/td> | 322K |
| 代理商： | P8XC557E8 |
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1999 Mar 12
68
Philips Semiconductors
Product specification
8-bit microcontroller
P8xC557E8
Table 82
I
2
C-bus interface timing
All values referred to V
IH(min)
and V
IL(max)
levels; see Fig.31.
Notes
1.
A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the V
IHmin
of the SCL
signal) in order to bridge the undefined region of the falling edge of SCL.
The maximum t
HD;DAT
has only to be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
A fast-mode I
2
C-bus device can be used in a standard-mode I
2
C-bus system, but the requirement t
SU, DAT
> 250 ns
must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal.
If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line
t
R(max)
+ t
SU,DAT
= 1000 + 250 = 1250 ns (according to the standard-mode I
2
C-bus specification) before the SCL line
is released.
C
b
= total capacitance of one bus line in pF.
2.
3.
4.
SYMBOL
PARAMETER
I
2
C-BUS
UNIT
STANDARD MODE
FAST MODE
MIN.
MAX.
MIN.
MAX.
f
SCL
t
BUF
SCL clock frequency
bus free time between STOP and START
condition
hold time (repeated) START condition; after this
period, the first clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
set-up time for a repeated START condition
data hold time:
for CBUS compatible masters
(see Chapter 21; notes 1 and 3)
for I
2
C-bus devices (notes 1 and 2)
data set-up time
rise time of SDA and SCL signals
fall time of SDA and SCL signals
set-up time for STOP condition
capacitive load for each bus line
pulse width of spikes which must be suppressed
by the input filter
0
4.7
100
0
1.3
400
kHz
μ
s
t
HD;STA
4.0
0.6
μ
s
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
4.7
4.0
4.7
1.3
0.6
0.6
μ
s
μ
s
μ
s
5.0
μ
s
0
250
4.0
0
100
(3)
0.9
μ
s
ns
ns
t
SU;DAT
t
RD
; t
RC
t
FD
; t
FC
t
SU;STO
C
b
t
SP
1000
300
400
20 + 0.1C
b(4)
300
0.6
0
400
50
μ
s
pF
ns
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