參數(shù)資料
型號(hào)： P8XC557E8
廠商： NXP Semiconductors N.V.
元件分類： 8位微控制器
英文描述： 8 BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 45/84頁(yè)
文件大?。?/td> 322K
代理商： P8XC557E8
1999 Mar 12
45
Philips Semiconductors
Product specification
8-bit microcontroller
P8xC557E8
15 REDUCED POWER MODES
Two software-selectable modes of reduced power
consumption are implemented: Idle and Power-down
mode. These modes are activated by software via SFR
PCON.
15.1
Idle mode
Idle mode operation permits the interrupt, serial ports and
timer blocks T0, T1 and T3 to function while the CPU is
halted. The functions that are switched off when the
microcontroller enters the Idle mode are:
CPU (halted)
Timer 2 (stopped and reset)
PWM0, PWM1 (reset, output = HIGH)
ADC (aborted if conversion in progress).
The functions that remain active during Idle mode may
generate an interrupt or reset and thus terminate the
Idle mode. These functions are:
Timer 0, Timer 1, Timer 3 (Watchdog Timer)
UART
I
2
C
External interrupt
Seconds timer.
The instruction that sets PCON.0 is the last instruction
executed in the normal operating mode before Idle mode
is activated.
Once in the Idle mode, the CPU status is preserved in its
entirety: the Stack Pointer, Program Counter, Program
Status Word, Accumulator, RAM and all other registers
maintain their data during Idle mode. The status of
external pins during Idle mode is shown in Table 69.
There are three ways to terminate the Idle mode:
Activation of any enabled interrupt X0, T0, X1, SEC, T1,
S0 or S1 will cause PCON.0 to be cleared by hardware
terminating Idle mode but only, if there is no interrupt in
service with the same or higher priority. The interrupt is
serviced, and following return from interrupt instruction
RETI, the next instruction to be executed will be the one
which follows the instruction that wrote a logic 1 to
PCON.0.
The flag bits GF0 and GF1 may be used to determine
whether the interrupt was received during normal
execution or during Idle mode.
For example, the instruction that writes to PCON.0 can
also set or clear one or both flag bits.
When Idle mode is terminated by an interrupt, the
service routine can examine the status of the flag bits.
The second way of terminating the Idle mode is with an
external hardware reset. Since the oscillator is still
running, the hardware reset is required to be active for
two machine cycles (24 HF oscillator periods) to
complete the reset operation if the HF oscillator is
selected.
When the PLL oscillator is selected a hardware reset of
≥
1
μ
s (but no longer than 10 ms) is required and the
microcontroller will typically restart within 63 ms after the
reset has finished.
The third way of terminating the Idle mode is by internal
watchdog reset. The microcontroller restarts after three
machine cycles in all cases.
15.2
Power-down mode
In Power-down mode the system clock is halted. If the PLL
oscillator is selected (SELXTAL1 = 0) and the RUN32 bit
is set, the 32 kHz oscillator keeps running, otherwise it is
stopped. If the HF oscillator (SELXTAL1 = 1) is selected,
it is stopped after setting the bit PD in the PCON register.
The instruction that sets PCON.1 is the last executed prior
to going into the Power-down mode. Once in
Power-down mode, the HF oscillator is stopped.
The 32 kHz oscillator may remain active. The contents of
the on-chip RAM and the Special Function Registers are
preserved.
Note that the Power-down mode can not be entered when
the Watchdog Timer has been enabled.
The Power-down mode can be terminated by an external
reset in the same way as in the 80C51 (RAM is saved, but
SFRs are cleared due to reset) or in addition by any one of
the external interrupts (INT0, INT1) or Seconds interrupt.
The status of the external pins during Power-down mode
is shown in Table 69. If the Power-down mode is activated
while in external Program Memory, the port data that is
held in the Special Function Register P2 is restored to
Port 2. If the data is a logic 1, the port pin is held HIGH
during the Power-down mode by the strong pull-up
transistor P1 (see Fig.8).
The Power-down mode should not be entered within an
interrupt routine because Wake-up with an external or
‘Seconds’ interrupt is not possible in that case.
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