參數(shù)資料
型號： P89V51RD2
廠商： NXP Semiconductors N.V.
英文描述： 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
中文描述： 8位80C51的5 V低功耗64 kB閃存1 KB RAM內(nèi)存控制器
文件頁數(shù)： 29/77頁
文件大?。?/td> 350K
代理商： P89V51RD2
Philips Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
Product data
Rev. 03 — 02 December 2004
29 of 77
9397 750 14341
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.3.1
Mode 0
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a fixed divide-by-32 prescaler.
Figure 8
shows Mode 0 operation.
In this mode, the Timer register is configured as a 13-bit register. As the count rolls
over from all 1s to all 0s, it sets the Timer interrupt flag TFn. The count input is
enabled to the Timer when TRn =
1
and either GATE = 0 or INTn =
1
. (Setting
GATE =
1
allows the Timer to be controlled by external input INTn, to facilitate pulse
width measurements). TRn is a control bit in the Special Function Register TCON
(
Figure 7
). The GATE bit is in the TMOD register.
The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper
3 bits of TLn are indeterminate and should be ignored. Setting the run flag (TRn)
does not clear the registers.
Mode 0 operation is the same for Timer 0 and Timer 1 (see
Figure 8
). There are two
different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
7.3.2
Mode 1
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register (THn and
TLn) are used. See
Figure 9
.
3
IE1
Interrupt 1 Edge flag. Set by hardware when external interrupt 1
edge/low level is detected. Cleared by hardware when the interrupt
is processed, or by software.
Interrupt 1 Type control bit. Set/cleared by software to specify
falling edge/low level that triggers external interrupt 1.
Interrupt 0 Edge flag. Set by hardware when external interrupt 0
edge/low level is detected. Cleared by hardware when the interrupt
is processed, or by software.
Interrupt 0 Type control bit. Set/cleared by software to specify
falling edge/low level that triggers external interrupt 0.
2
IT1
1
IE0
0
IT0
Table 18:
Bit
TCON - Timer/Counter control register (address 88H) bit description
Symbol
Description
Fig 8.
Timer/Counter 0 or 1 in Mode 0 (13-bit counter).
002aaa519
Osc/6
Tn pin
TRn
TnGate
INTn Pin
C/T = 0
C/T = 1
TLn
(5-bits)
THn
(8-bits)
TFn
control
overflow
interrupt
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89V51RD2BN 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 64K FLASH DIP40 制造商:NXP Semiconductors 功能描述:IC, MCU 8BIT 80C51 64K FLASH, DIP40
P89V51RD2BN,112 功能描述:8位微控制器 -MCU 80C51 5V 16/32/64KB FLASH MCU 1 KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89V51RD2FA 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 64K FLASH PLCC44
P89V51RD2FA,512 功能描述:8位微控制器 -MCU 80C51 64K FL / 1K RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89V51RD2FA512 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 40MHZ LCC-44
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