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參數資料
| 型號： | P89V51RD2 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM |
| 中文描述： | 8位80C51的5 V低功耗64 kB閃存1 KB RAM內存控制器 |
| 文件頁數： | 16/77頁 |
| 文件大?。?/td> | 350K |
| 代理商： | P89V51RD2 |
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Philips Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
Product data
Rev. 03 — 02 December 2004
16 of 77
9397 750 14341
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.1.4
Brown-out detect reset
The device includes a brown-out detection circuit to protect the system from severe
supply voltage fluctuations. The P89V51RB2/RC2/RD2's brown-out detection
threshold is 2.35 V. When V
DD
drops below this voltage threshold, the brown-out
detect triggers the circuit to generate a brown-out interrupt but the CPU still runs until
the supplied voltage returns to the brown-out detection voltage V
BOD
. The default
operation for a brown-out detection is to cause a processor reset.
V
DD
must stay below V
BOD
at least four oscillator clock periods before the brown-out
detection circuit will respond.
Brown-out interrupt can be enabled by setting the EBO bit (IEA.3). If EBO bit is set
and a brown-out condition occurs, a brown-out interrupt will be generated to execute
the program at location 004BH. It is required that the EBO bit be cleared by software
after the brown-out interrupt is serviced. Clearing EBO bit when the brown-out
condition is active will properly reset the device. If brown-out interrupt is not enabled,
a brown-out condition will reset the program to resume execution at location 0000H.
A brown-out detect reset will clear the BSEL bit (FCF.0) but will not change the SWR
bit (FCF.1) and therefore will not change the banking of the lower 8 kB of user code
memory space.
7.1.5
Watchdog reset
Like a brown-out detect reset, the watchdog timer reset will clear the BSEL bit (FCF.0)
but will not change the SWR bit (FCF.1) and therefore will not change the banking of
the lower 8 kB of user code memory space.
The state of the SWR and BSEL bits after different types of resets is shown in
Table 6
. This results in the code memory bank selections as shown.
7.1.6
Data RAM memory
The data RAM has 1024 bytes of internal memory. The device can also address up to
64 kB for external data memory.
7.1.7
Expanded data RAM addressing
The P89V51RB2/RC2/RD2 has 1 kB of RAM. See
Figure 6 “Internal and external
data memory structure.” on page 19
.
The device has four sections of internal data memory:
1. The lower 128 bytes of RAM (00H to 7FH) are directly and indirectly addressable.
Table 6:
Reset source
Effects of reset sources on bank selection
SWR bit result
(FCF.1)
External reset
0
Power-on reset
Watchdog reset
x
Brown-out detect reset
BSEL bit result
(FCF.0)
0
addresses from 0000h to
1FFFh
Bootcode (in Block 1)
addresses above
1FFFh
User code (in Block 0)
0
Retains state of SWR bit. If SWR,
BSEL = 00 then uses Bootcode.
If SWR, BSEL = 10 then uses
user code.
User code (in Block 0)
Software reset
1
0
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相關代理商/技術參數 |
參數描述 |
|---|---|
| P89V51RD2BN | 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 64K FLASH DIP40 制造商:NXP Semiconductors 功能描述:IC, MCU 8BIT 80C51 64K FLASH, DIP40 |
| P89V51RD2BN,112 | 功能描述:8位微控制器 -MCU 80C51 5V 16/32/64KB FLASH MCU 1 KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89V51RD2FA | 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 64K FLASH PLCC44 |
| P89V51RD2FA,512 | 功能描述:8位微控制器 -MCU 80C51 64K FL / 1K RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89V51RD2FA512 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 40MHZ LCC-44 |
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