參數(shù)資料
型號: P89LPC9103FTK
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter
中文描述: 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO10
封裝: 3 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-229, SOT-650-1, HVSON-10
文件頁數(shù): 58/58頁
文件大?。?/td> 257K
代理商: P89LPC9103FTK
Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 11 April 2005
Document number: 9397 750 14655
Published in the Netherlands
Philips Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
21. Contents
1
2
2.1
2.2
3
4
4.1
5
6
7
7.1
7.2
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
8.15
8.16
8.17
8.18
8.19
8.20
8.21
8.22
8.23
8.24
8.25
8.26
9
9.1
9.2
9.3
9.4
9.5
9.6
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Principal features . . . . . . . . . . . . . . . . . . . . . . . 1
Additional features . . . . . . . . . . . . . . . . . . . . . . 1
Product comparison overview . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 3
Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 6
Pinning information. . . . . . . . . . . . . . . . . . . . . . 8
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional description . . . . . . . . . . . . . . . . . . 14
Special function registers . . . . . . . . . . . . . . . . 14
Enhanced CPU. . . . . . . . . . . . . . . . . . . . . . . . 26
Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
On-chip RC oscillator option. . . . . . . . . . . . . . 26
Watchdog oscillator option . . . . . . . . . . . . . . . 27
External clock input option . . . . . . . . . . . . . . . 27
CCLK wake-up delay . . . . . . . . . . . . . . . . . . . 28
CCLK modification: DIVM register . . . . . . . . . 28
Low power select . . . . . . . . . . . . . . . . . . . . . . 28
Memory organization . . . . . . . . . . . . . . . . . . . 28
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Power monitoring functions. . . . . . . . . . . . . . . 32
Power reduction modes . . . . . . . . . . . . . . . . . 32
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Timers 0 and 1 . . . . . . . . . . . . . . . . . . . . . . . . 34
RTC/system timer. . . . . . . . . . . . . . . . . . . . . . 35
UART (P89LPC9103/9107) . . . . . . . . . . . . . . 35
Analog comparators . . . . . . . . . . . . . . . . . . . . 37
Internal reference voltage. . . . . . . . . . . . . . . . 37
Comparator interrupt. . . . . . . . . . . . . . . . . . . . 38
Comparator and power reduction modes . . . . 38
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . 38
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . 38
Additional features . . . . . . . . . . . . . . . . . . . . . 39
Flash program memory. . . . . . . . . . . . . . . . . . 40
A/D Converter. . . . . . . . . . . . . . . . . . . . . . . . . . 42
General description. . . . . . . . . . . . . . . . . . . . . 42
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . 43
A/D operating modes . . . . . . . . . . . . . . . . . . . 43
Conversion start modes . . . . . . . . . . . . . . . . . 44
Boundary limits interrupt. . . . . . . . . . . . . . . . . 44
9.7
DAC output to a port pin with high output
impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Clock divider. . . . . . . . . . . . . . . . . . . . . . . . . . 44
Power-down and Idle mode . . . . . . . . . . . . . . 45
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 46
Static characteristics . . . . . . . . . . . . . . . . . . . 47
Dynamic characteristics. . . . . . . . . . . . . . . . . 49
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Other characteristics . . . . . . . . . . . . . . . . . . . 52
Comparator electrical characteristics. . . . . . . 52
A/D converter electrical characteristics . . . . . 52
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 53
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 55
Revision history . . . . . . . . . . . . . . . . . . . . . . . 56
Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 57
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Contact information . . . . . . . . . . . . . . . . . . . . 57
9.8
9.9
10
11
12
12.1
13
13.1
13.2
14
15
16
17
18
19
20
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