參數(shù)資料
型號(hào): P89LPC9103FTK
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter
中文描述: 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO10
封裝: 3 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-229, SOT-650-1, HVSON-10
文件頁(yè)數(shù): 30/58頁(yè)
文件大小: 257K
代理商: P89LPC9103FTK
9397 750 14655
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 11 April 2005
30 of 58
Philips Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
8.12 I/O ports
The P89LPC9102/9103/9107 has either 6, 7, or 8 I/O pins depending on the reset pin
option and clock source option chosen. Refer to
Table 10
.
[1]
Required for operation above 12 MHz.
8.12.1
Port configurations
All but one I/O port pin on the P89LPC9102/9103/9107 may be configured by software to
one of four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port
outputs), push-pull, open drain, and input-only. Two configuration registers for each port
select the output type for each port pin.
P1.5 (RST) can only be an input and cannot be configured.
Fig 13. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC9103/9107).
002aaa977
BOF
EBO
KBIF
EKBI
interrupt
to CPU
wake-up
(if in power-down)
EWDRT
CMF
EC
EA (IE0.7)
RTCF
ERTC
(RTCCON.1)
WDOVF
TF1
ET1
TI and RI/RI
ES/ESR
TI
EST
TF0
ET0
ENADCI1
ADCI1
ENBI1
BNDI1
EAD
Table 10:
Clock source
Number of I/O pins available
Reset option
Number of I/O pins
(10-pin package)
8
Number of I/O pins
(14-pin package)
10
On-chip oscillator or watchdog
oscillator
No external reset (except during
power-up)
External RST pin supported
No external reset (except during
power-up)
External RST pin supported
[1]
7
7
9
9
External clock input
6
8
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