- 您現在的位置：買賣IC網 > PDF目錄367723 > P83C591SFA (NXP SEMICONDUCTORS) Single-chip 8-bit microcontroller with CAN controller PDF資料下載
參數資料
| 型號： | P83C591SFA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 8-bit microcontroller with CAN controller |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, SOT-187-2, LCC-44 |
| 文件頁數： | 50/161頁 |
| 文件大?。?/td> | 588K |
| 代理商： | P83C591SFA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁當前第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁
1999 Aug 19
50
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
12.5.17.2 Acceptance Filter Enable Register
Each defined Acceptance Filter is enabled or disabled by a certain bit located within the Acceptance Filter Enable
Register. This allows to change the Acceptance Filter Contents “on the fly” during normal operation if the corresponding
filter is disabled previously. A disabled Acceptance Filter does not allow passing of messages to the receive buffer. If all
Acceptance Filters are disabled (default after hardware reset) no messages will pass to the receive buffer at all.
The Acceptance Code and Mask registers are writable only, if the related Acceptance Filter is disabled or the CAN Block
is in Reset Mode.
Note, that some bits are implemented only in case of the corresponding acceptance filter bank is implemented.
Not implemented bits are read as “0”.
Table 33
Acceptance Filter Enable Register (ACF Enable) (CAN address 30)
7
6
5
4
3
2
1
0
B4F2EN
B4F1EN
B3F2EN
B3F1EN
B2F2EN
B2F1EN
B1F2EN
B1F1EN
Table 34
Acceptance Filter Enable Register (ACF Enable)
Note, if the Single Filter Mode is selected for an Acceptance Filter Bank, this single filter is related to the corresponding
Filter 1 Enable Bit. The Filter 2 Enable Bits have no influence within Single Filter Mode.
BIT
SYMBOL
B4F2EN
NAME
VALUE
1 (enabled) Filter 2 of Bank 4 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 2 of Bank 4 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 1 of Bank 4 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 1 of Bank 4 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 2 of Bank 3 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 2 of Bank 3 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 1 of Bank 3 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 1 of Bank 3 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 2 of Bank 2 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 2 of Bank 2 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 1 of Bank 2 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 1 of Bank 2 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 2 of Bank 1 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 2 of Bank 1 is enabled, changing of corresponding
Mask and Code Registers is possible.
1 (enabled) Filter 1 of Bank 1 is enabled, no write access to
corresponding Mask and Code Registers is possible
0 (disabled) Filter 1 of Bank 1 is enabled, changing of corresponding
Mask and Code Registers is possible.
FUNCTION
ACFEN.7
Bank 4 Filter 2
Enable
ACFEN.6
B4F1EN
Bank 4 Filter 1
Enable
ACFEN.5
B3F2EN
Bank 3 Filter 2
Enable
ACFEN.4
B3F1EN
Bank 3 Filter 1
Enable
ACFEN.3
B2F2EN
Bank 2 Filter 2
Enable
ACFEN.2
B2F1EN
Bank 2 Filter 1
Enable
ACFEN.1
B1F2EN
Bank 1 Filter 2
Enable
ACFEN.0
B1F1EN
Bank 1 Filter 1
Enable
相關PDF資料 |
PDF描述 |
|---|---|
| P87C591SFA | Single-chip 8-bit microcontroller with CAN controller |
| P80C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P83C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P87C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P80C591 | Single-chip 8-bit microcontroller with CAN controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| P83C591SFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C592 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN |
| P83C592FFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN |
發(fā)布緊急采購，3分鐘左右您將得到回復。