- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367723 > P83C591SFA (NXP SEMICONDUCTORS) Single-chip 8-bit microcontroller with CAN controller PDF資料下載
參數(shù)資料
| 型號(hào)： | P83C591SFA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-chip 8-bit microcontroller with CAN controller |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, SOT-187-2, LCC-44 |
| 文件頁(yè)數(shù)： | 22/161頁(yè) |
| 文件大小： | 588K |
| 代理商： | P83C591SFA |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)
1999 Aug 19
22
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
11 LOW POWER MODES
11.1
Stop Clock Mode
The static design enables the clock speed to be reduced
down to 0 MHz (stopped). When the oscillator is stopped,
the RAM and Special Function Registers retain their
values. This mode allows step-by-step utilization and
permits reduced system power consumption by lowering
the clock frequency down to any value. For lowest power
consumption the Power-down mode is suggested.
11.2
Idle Mode
In the Idle mode (see Table 7), the CPU puts itself to sleep
while all of the on-chip peripherals stay active. The
instruction to invoke the idle mode is the last instruction
executed in the normal operating mode before the Idle
mode is activated. The CPU contents, the on-chip RAM,
and all of the special function registers remain intact during
this mode. The Idle mode can be terminated either by any
enabled interrupt (at which time the process is picked up
at the interrupt service routine and continued), or by a
hardware reset which starts the processor in the same
manner as a Power-on reset.
11.3
Power-down Mode
To save even more power, a Power-down mode (see
Table 7) can be invoked by software. In this mode, the
oscillator is stopped and the instruction that invoked Power
Down is the last instruction executed. The on-chip RAM
and Special Function Registers retain their values down to
2.0 V and care must be taken to return V
CC
to the minimum
specified operating voltages before the Power-down Mode
is terminated.
A hardware reset or external interrupt can be used to exit
from Power-down. The Wake-up from Power-down bit,
WUPD (AUXR1.3) must be set in order for an interrupt to
cause a Wake-up from Power-down. Reset redefines all
the SFRs but does not change the on-chip RAM. A
Wake-up allows both the SFRs and the on-chip RAM to
retain their values.
To properly terminate Power-down the reset or external
interrupt should not be executed before V
CC
is restored to
its normal operating level and must be held active long
enough for the oscillator to restart and stabilize (normally
less than 10 ms).
Table 7
Status of external pins during Idle and Power-down modes
With an external interrupt, INT0 and INT1 must be enabled and configured as level-sensitive. Holding the pin low restarts
the oscillator but bringing the pin back high completes the exit. Once the interrupt is serviced, the next instruction to be
executed after RETI will be the one following the instruction that put the device into Power-down.
MODE
MEMORY
ALE
PSEN
PORT 0
PORT 1
PORT 2
PORT 3
PWM0/
PWM1
Idle
internal
external
internal
external
1
1
0
0
1
1
0
0
port data
float
port data
float
port data
port data
port data
port data
port data
address
port data
port data
port data
port data
port data
port data
high
high
high
high
Power-down
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P87C591SFA | Single-chip 8-bit microcontroller with CAN controller |
| P80C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P83C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P87C591SFB | Single-chip 8-bit microcontroller with CAN controller |
| P80C591 | Single-chip 8-bit microcontroller with CAN controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P83C591SFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C591VFB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 8-bit microcontroller with CAN controller |
| P83C592 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN |
| P83C592FFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with on-chip CAN |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。