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參數(shù)資料
| 型號： | P82C55A |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS PROGRAMMABLE PERIPHERAL INTERFACE |
| 中文描述： | 24 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 325K |
| 代理商： | P82C55A |
82C55A
Output Control Signal Definition
OBF (Output Buffer Full F/F).
The OBF output will
go ‘‘low’’ to indicate that the CPU has written data
out to the specified port. The OBF F/F will be set by
the rising edge of the WR input and reset by ACK
Input being low.
ACK (Acknowledge Input).
A ‘‘low’’ on this input
informs the 82C55A that the data from Port A or Port
B has been accepted. In essence, a response from
the peripheral device indicating that it has received
the data output by the CPU.
INTR (Interrupt Request).
A ‘‘high’’ on this output
can be used to interrupt the CPU when an output
device has accepted data transmitted by the CPU.
INTR is set when ACK is a ‘‘one’’, OBF is a ‘‘one’’
and INTE is a ‘‘one’’. It is reset by the falling edge of
WR.
INTE A
Controlled by bit set/reset of PC
6
.
INTE B
Controlled by bit set/reset of PC
2
.
231256–15
Figure 10. MODE 1 Output
231256–16
Figure 11. MODE 1 (Strobed Output)
12
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相關代理商/技術參數(shù) |
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|---|---|
| P82C55A2 | 制造商:Intel 功能描述: |
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| P82C59A2 | 制造商:INTEL 功能描述:* 制造商:Intel 功能描述: |
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