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參數(shù)資料
| 型號(hào)： | OM6213 |
| 英文描述： | 48 x 84 pixels matrix LCD driver |
| 中文描述： | 48 × 84像素的矩陣LCD驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 9/40頁 |
| 文件大小： | 213K |
| 代理商： | OM6213 |
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2001 Nov 07
9
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD driver
OM6213
9
INITIALIZATION
Immediately following power-on, all internal registers and
the RAM content are undefined. A reset (RES) pulse must
be applied.
It should be noted that the device may be
damaged if not properly reset.
Reset is accomplished by applying an external RES pulse
(active LOW) at pad RES. When reset occurs within the
specified time, all internal registers are reset, however the
RAM is still undefined. The state after reset is described in
Section “Reset function”.
RES input must be
≤
0.3V
DD1
after V
DD1
reaches
V
DD(min)
(or higher) according to t
VHRL
timing
(see
Fig.16)
.
10 ADDRESSING
Data is downloaded in bytes into the RAM matrix of the
OM6213 as indicated in Figs.3, 4, 5 and 6. The display
RAM has a matrix of 48
×
84 bits. The columns are
addressed by the address pointer.
The address ranges are: X = 0 to 83 (1010011) and
Y = 0 to 5 (101). Addresses outside these ranges are not
allowed.
In vertical addressing mode (V = 1) the Y address
increments after each byte (see Fig.5). After the last
Y address (Y = 5) Y wraps around to 0 and X increments
to address the next column.
In horizontal addressing mode (V = 0) the X address
increments after each byte; see Fig.6. After the last
X address (X = 83) X wraps around to 0 and Y increments
to address the next row.
After the very last address (X = 83 and Y = 5) the address
pointers wrap around to address (X = 0 and Y = 0).
10.1
Data structure
handbook, full pagewidth
MGT843
0
5
0
83
X address
Y address
MSB
Fig.4 RAM format, addressing.
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