參數資料
型號： OM6213
英文描述： 48 x 84 pixels matrix LCD driver
中文描述： 48 × 84像素的矩陣LCD驅動器
文件頁數： 6/40頁
文件大?。?/td> 213K
代理商： OM6213
2001 Nov 07
6
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD driver
OM6213
7.7
T1 to T7: test pads
In the application, T4, T5 and T7 must be connected to
V
SS
. T1, T2, T3 and T6 must be left open-circuit.
7.8
SDIN: serial data line
Data line and HV-gen programming input.
7.9
SCLK: serial clock line
Input for the clock signal. 0 to 4.0 Mbits/s.
7.10
D/C: mode select
Input to select either command/address or data input.
7.11
SCE: chip enable
The enable pin allows data to be clocked in; this signal is
active LOW.
7.12
OSC: oscillator
If the on-chip oscillator is used, this input must be
connected to V
DD1
. If an external clock is used, it must be
connected to pin OSC. If pin OSC is left at V
SS1
, the
internal clock is disabled, the device is not clocked and the
display may be left in a DC state. To avoid this, it is
advisable to enter the Power-down mode before stopping
the clock.
7.13
RES: reset
This signal will reset the device and must be applied to
properly initialize the chip; this signal is active LOW.
8
BLOCK DIAGRAM FUNCTIONS
8.1
Oscillator
The on-chip oscillator provides the clock signal for the
display system. No external components are required and
the OSC input must be connected to V
DD1
. If an external
clock signal is used, it must be connected to pin OSC.
8.2
Address counter (AC)
The address counter assigns addresses to the display
data RAM for writing. The X address X[6:0] and the
Y addressY[2:0]aresetseparately.Afterawriteoperation
the address counter is automatically incremented by 1
according to the V flag.
8.3
Display Data RAM (DDRAM)
The OM6213 contains a 48
×
84 bit static RAM which
stores the display data. The RAM is divided into 6 banks of
84 bytes (6
×
8
×
84 bits). During RAM access, data is
transferred to the RAM via the serial interface. There is a
direct correspondence between the X address and the
column output number.
8.4
Timing generator
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not affected by operations on the data bus.
8.5
Display address counter
The display is generated by continuously shifting rows of
RAM data to the dot matrix LCD via the column outputs.
The display status (all dots on/off and normal/inverse
video) is set by bits D and E in the command ‘Display
control’ (see Table 2).
8.6
LCD row and column drivers
The OM6213 contains 48 rows and 84 column drivers,
which connect the appropriate LCD bias voltages in
sequence to the display in accordance with the data to be
displayed. Figure 2 shows typical waveforms. Unused
outputs should be left unconnected.
8.7
V
LCD
generator
The voltage multiplier (i.e. charge pump) generates the
V
LCD
voltage. The multiplication factor is Module Maker
programmable (default value 4).
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