參數(shù)資料
型號(hào): NT7502H-BDT
廠商: Electronic Theatre Controls, Inc.
英文描述: 65 X 132 RAM-Map LCD Controller / Driver
中文描述: 65 × 132 RAM的地圖LCD控制器/驅(qū)動(dòng)器
文件頁(yè)數(shù): 37/54頁(yè)
文件大小: 687K
代理商: NT7502H-BDT
NT7502
AC Characteristics
(1) System buses Read / Write characteristics 1 (For the 8080 Series MPU)
t
AS8
t
AH8
t
CYC8
t
CCLW
t
CCLR
t
CCHW
t
CCHR
t
DS8
t
DH8
t
ACC8
t
CH8
A0
D0 - D7
(WRITE)
D0 - D7
(READ)
RD
,
WR
1
CS
(CS2 = "1")
(V
DD
= 2.7 - 3.3V, T
A
= -40 - 85
°
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
T
AH8
Address hold time
0
ns
T
AS8
Address setup time
0
ns
T
CYC8
System cycle time
300
ns
T
CCLW
Control L pulse width (WR)
90
ns
T
CCLR
Control L pulse width (RD)
120
ns
T
CCHW
Control H pulse width (WR)
120
ns
T
CCHR
Control H pulse width (RD)
60
ns
T
DS8
Data setup time
40
ns
T
DH8
Data hold time
15
ns
T
ACC8
RD
access time
140
ns
C
L
= 100pF
T
CH8
Output disable time
10
100
ns
C
L
= 100pF
*1. The input signal rise time and fall time (t
r
, t
f
) is specified at 15ns or less. When the system cycle time is extremely fast, (t
r
+t
f
)
(t
CYC8
-t
CCLW
-t
CCHW
) for (t
r
+t
f
)
(t
CYC8
-t
CCLR
-t
CCHR
) are specified.
*2. All timing is specified using 20% and 80% of V
DD
as the reference.
*3. t
CCLW
and t
CCLR
are specified as the overlap between
1
CS being “L” (CS2 = “H”) and
WR
and
RD
being at the “L” level.
37
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