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參數(shù)資料
| 型號： | NSC800 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁數(shù)： | 52/76頁 |
| 文件大?。?/td> | 785K |
| 代理商： | NSC800 |
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12.12 Input/Output
IN
A, (n)
Input data to the Accumulator from the I/O device at ad-
dress N.
A
w
(n)
No flags affected
7
6
5
4
3
2
1
0
1
1
0
1
1
0
1
1
n
Timing:
M cycles D 3
T states D 11 (4, 3, 4)
Addressing Mode:
Source D Direct
Destination D Register
IN
r, (C)
Input data to register r from the I/O device addressed by the
contents of register C. If r
e
110 only flags are affected.
r
w
(C)
S: Set if result is negative
Z: Set if result is zero
H: Reset
P/V: Set if result parity is even
N: Reset
C: N/A
0
7
6
5
4
3
2
1
1
1
1
0
1
1
0
1
0
1
r
0
0
0
Timing:
M cycles D 3
T states D 12 (4, 4, 4)
Addressing Mode:
Source D Register Indirect
Destination D Register
OUT
(C), r
Output register r to the I/O device addressed by the con-
tents of register C.
(C)
w
r
No flags affected
7
6
5
4
3
2
1
0
1
1
1
0
1
1
0
1
0
1
r
0
0
1
Timing:
M cycles D 3
T states D 12 (4, 4, 4)
Addressing Mode:
Source D Register
Destination D Register Indirect
INI
Input data from the I/O device addressed by the contents of
register C to the memory location pointed to by the contents
of the HL register. The HL pointer is incremented and the
byte counter B is decremented.
(HL)
w
(C)
S: Undefined
B
w
B
b
1
Z: Set if B
b
1
e
0, otherwise reset
HL
w
HL
a
1
H: Undefined
P/V: Undefined
N: Set
C: N/A
0
7
6
5
4
3
2
1
1
1
1
0
1
1
0
1
1
0
1
0
0
0
1
0
Timing:
M cycles D 4
T states D 16 (4, 5, 3, 4)
Addressing Mode:
Implied/Source D Register In-
direct
Destination D Register Indirect
OUTI
Output data from memory location (HL) to the I/O device at
port address (C), increment the memory pointer, and decre-
ment the byte counter B.
(C)
w
(HL)
S: Undefined
B
w
B
b
1
Z: Set if B
b
1
e
0, otherwise reset
HL
w
HL
a
1
H: Undefined
P/V: Undefined
N: Set
C: N/A
0
7
6
5
4
3
2
1
1
1
1
0
1
1
0
1
1
0
1
0
0
0
1
1
Timing:
M cycles D 4
T states D 16 (4, 5, 3, 4)
Addressing Mode:
Implied/Source D Register In-
direct
Destination D Register Indirect
IND
Input data from I/O device at port address (C) to memory
location (HL), and decrement HL memory pointer and byte
counter B.
(HL)
w
(C)
S: Undefined
HL
w
HL
b
1
Z: Set if B
b
1
e
0, otherwise reset
B
w
B
b
1
H: Undefined
P/V: Undefined
N: Set
C: N/A
0
7
6
5
4
3
2
1
1
1
1
0
1
1
0
1
1
0
1
0
1
0
1
0
Timing:
M cycles D 4
T states D 16 (4, 5, 3, 4)
Addressing Mode:
Implied/Source D Register In-
direct
Destination D Register Indirect
52
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NSC800D | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800E | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800N | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800V | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC858 | NSC858 Universal Asynchronous Receiver/Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NSC800D | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC800D/883C | 制造商: 功能描述: 制造商:undefined 功能描述: |
| NSC800D/B | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| NSC800D-1I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800D-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
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