參數(shù)資料
型號(hào)： NSC800
廠商： National Semiconductor Corporation
英文描述： NSC800TM High-Performance Low-Power CMOS Microprocessor
中文描述： NSC800TM高性能低功耗CMOS微處理器
文件頁(yè)數(shù)： 14/76頁(yè)
文件大小： 785K
代理商： NSC800
8.0 Functional Description
(Continued)
8.4.7 Zero Flag (Z)
Loading a zero in the accumulator or when a zero results
from an operation sets the zero flag.
The following operations affect the zero flag.
#
Adds (16-bit with carry, 8-bit with/without carry)
#
Subtracts (16-bit with carry, 8-bit with/without carry)
#
Logic Operations
#
Increments and Decrements
#
Rotate and Shifts
#
Rotate Digits
#
Decimal Adjust
#
Input Register Indirect
#
Block I/O (always set after auto repeat block I/O)
#
Block Searches
#
Load of I and R Registers
#
Bit Tests
#
Negation of Accumulator
The Z flag has no signficance immediately after the follow-
ing operations:
#
Block Transfers
Other operations do not affect the zero flag.
8.4.8 Sign Flag (S)
The sign flag stores the state of bit 7 (the most-signifi-
cant bit and sign bit) of the accumulator following an arith-
metic operation. This flag is of use when dealing with signed
numbers.
The sign flag is affected by the following operation accord-
ing to the result:
#
Adds (16-bit with carry, 8-bit with/without carry)
#
Subtracts (16-bit with carry, 8-bit with/without carry)
#
Logic Operations
#
Increments and Decrements
#
Rotate and Shifts
#
Rotate Digits
#
Decimal Adjust
#
Input Register Indirect
#
Block Search
#
Load of I and R Registers
#
Negation of Accumulator
The S flag has no significance immediately after the follow-
ing operations:
#
Block I/O
#
Block Transfers
#
Bit Tests
Other operations do not affect the sign bit.
8.4.9 Additional General-Purpose Registers
The other general-purpose registers are the B, C, D, E, H
and L registers and their alternate register set, B’, C’, D’, E’,
H’ and L’. The general-purpose registers can be used inter-
changeably.
In addition, the B and C registers perform special functions
in the NSC800 expanded I/O capabilities, particularly block
I/O operations. In these functions, the C register can ad-
dress I/O ports; the B register provides a counter function
when used in the register indirect address mode.
When used with the special condition jump instruction
(DJNZ) the B register again provides the counter function.
8.4.10 Alternate Configurations
The six 8-bit general purpose registers (B,C,D,E,H,L) will
combine to form three 16-bit registers. This occurs by con-
catenating the B and C registers to form the BC register, the
D and E registers form the DE register, and the H and L
registers form the HL register.
Having these 16-bit registers allows 16-bit data handling,
thereby expanding the number of 16-bit registers available
for memory addressing modes. The HL register typically
provides the pointer address for use in register indirect ad-
dressing of the memory.
The DE register provides a second memory pointer register
for the NSC800’s powerful block transfer operations. The
BC register also provides an assist to the block transfer
operations by acting as a byte-counter for these operations.
8.5 ARITHMETIC-LOGIC UNIT (ALU)
The arithmetic, logic and rotate instructions are performed
by the ALU. The ALU internally communicates with the reg-
isters and data buffer on the 8-bit internal data bus.
8.6 INSTRUCTION REGISTER AND DECODER
During an opcode fetch, the first byte of an instruction is
transferred from the data buffer (i.e. its on the internal data
bus) to the instruction register. The instruction register feeds
the instruction decoder, which gated by timing signals, gen-
erates the control signals that read or write data from or to
the registers, control the ALU and provide all required exter-
nal control signals.
14
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參數(shù)描述
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NSC800D/883C 制造商: 功能描述: 制造商:undefined 功能描述:
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NSC800D-3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor
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