參數(shù)資料
型號(hào): NS16C2752TVA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): 微控制器/微處理器
英文描述: Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate
中文描述: 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 24/43頁(yè)
文件大?。?/td> 881K
代理商: NS16C2752TVA
6.0 Register Set
(Continued)
6.12 ALTERNATE FUNCTION REGISTER (AFR)
This is a read/write register used to select simultaneous
write to both register sets and alter MF pin functions.
TABLE 18. AFR (0x2, LCR[7] = 1, LCR != 0xBF)
Bit
7:3
Bit Name
Default
Reserved
R/W
Def
Description
Reserved
These bits are set to a logic 0.
Multi-function Pin Output Select
These select the output signal that will be present on the multi-function pin, MF.
These bits are individually programmable for each channel, so that different signals
can be selected on each channel.
2:1
MF Output Sel
R/W
0
AFR[2]
1
1
0
0
Concurrent Write Enable
1 = CPU can write concurrently to the same register in both registers sets. This
function is intended to reduce the DUART initialization time. It can be used by a CPU
when both channels are initialized to the same state. The CPU can set or clear this bit
by accessing either register set. When this bit is set the channel select pin still selects
the channel to be accessed during read operations. Setting or clearing this bit has no
effect on read operations.
The user should ensure that the DLAB bit LCR[7] of both channels are in the same
state before executing a concurrent write to register addresses 0, 1 and 2.
0 = No concurrent write (default). (No impact on read operations.)
AFR[1]
1
0
1
0
MF Function
= Reserved (MF output is forced logic 1)
= RXRDY
= BAUDOUT
= OUT2 (default)
0
Concurrent
Write Ena
R/W
0
6.13 DEVICE IDENTIFICATION REGISTER (ID)
The device ID for NS16C2552 is 0x03. DLL and DLM should
be initialized to 0x00 before reading the ID register. This is a
read-only register.
TABLE 19. DREV (0x0, LCR[7]=1, LCR!=0xBF, DLL=DLM=0x00)
Bit
7:4
Bit Name
Device ID
R/W
Def
R
Description
Device ID
Value = 0x3 for NS16C2552; 0x2 for NS16C2752
Device Revision
Value = 0x1.
3:0
Device Rev
R
N
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