參數(shù)資料
型號: NDS9947
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Dual P-Channel Enhancement Mode Field Effect Transistor
中文描述: 3.5 A, 20 V, 0.1 ohm, 2 CHANNEL, P-CHANNEL, Si, POWER, MOSFET
封裝: SO-8
文件頁數(shù): 1/10頁
文件大小: 342K
代理商: NDS9947
February 1996
NDS9947
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
________________________________________________________________________________
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
Parameter
NDS9947
Units
V
DSS
Drain-Source Voltage
-20
V
V
GSS
Gate-Source Voltage
± 20
V
I
D
Drain Current
- Continuous
T
A
= 25°C
(Note 1a)
± 3.5
A
- Continuous T
A
= 70°C
(Note 1a)
- Pulsed
T
A
= 25°C
± 2.5
± 10
P
D
Power Dissipation for Dual Operation
2
W
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
0.9
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
°C/W
Thermal Resistance, Junction-to-Case
(Note 1)
40
°C/W
NDS9947.SAM
-3.5A, -20V. R
DS(ON)
= 0.1
@ V
GS
= 10V
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
1
5
6
7
8
4
3
2
1997 Fairchild Semiconductor Corporation
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