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參數(shù)資料
| 型號(hào)： | NDC652 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | P-Channel Logic Level Enhancement Mode Field Effect Transistor |
| 中文描述： | P溝道增強(qiáng)模式的邏輯電平場(chǎng)效應(yīng)晶體管 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 247K |
| 代理商： | NDC652 |
March 1996
NDC652P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
____________________________________________________________________________________________
Absolute Maximum Ratings
Symbol Parameter
T
A
= 25°C unless otherwise noted
NDC652P
Units
V
DSS
Drain-Source Voltage
-30
V
V
GSS
I
D
Gate-Source Voltage - Continuous
-20
V
Drain Current - Continuous
-2.4
A
- Pulsed
-10
P
D
Maximum Power Dissipation
(Note 1a)
1.6
W
(Note 1b)
1
(Note 1c)
0.8
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Note 1a
)
78
°C/W
Thermal Resistance, Junction-to-Case
(Note 1)
30
°C/W
NDC652P Rev. D1
3
5
6
4
1
2
-2.4A, -30V. R
DS(ON)
= 0.18
@ V
GS
= -4.5V
R
DS(ON)
= 0.11
@ V
GS
= -10V.
Proprietary SuperSOT
TM
-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management and other
battery powered circuits where fast high-side switching,
and low in-line power loss are needed in a very small
outline surface mount package.
1997 Fairchild Semiconductor Corporation
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PDF描述 |
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| NDC652P | P-Channel Logic Level Enhancement Mode Field Effect Transistor |
| NDC7001 | Dual N & P-Channel Enhancement Mode Field Effect Transistor |
| NDC7001C | Dual N & P-Channel Enhancement Mode Field Effect Transistor |
| NDC7002 | Dual N-Channel Enhancement Mode Field Effect Transistor |
| NDC7002N | Dual N-Channel Enhancement Mode Field Effect Transistor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NDC652P | 功能描述:MOSFET SO-6 P-CH LOGIC RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDC652P_F095 | 功能描述:MOSFET -30V 2.4A P-CH ENHANCEMENT MODE RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDC652P_Q | 功能描述:MOSFET SO-6 P-CH LOGIC RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| NDC7001 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual N & P-Channel Enhancement Mode Field Effect Transistor |
| NDC7001C | 功能描述:MOSFET Dual N/P Channel FET Enhancement Mode RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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