參數(shù)資料
型號： NAND256W4A2AZA6E
廠商： NUMONYX
元件分類： PROM
英文描述： 16M X 16 FLASH 3V PROM, 12000 ns, PBGA55
封裝： 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, VFBGA-55
文件頁數(shù)： 52/58頁
文件大小： 1406K
代理商： NAND256W4A2AZA6E
Revision history
NAND128-A, NAND256-A
13
Revision history
Table 24.
Document revision history
Date
Version
Revision details
06-Jun-2003
1
Initial release.
07-Aug-2003
2
Design phase.
27-Oct-2003
3
Engineering phase.
03-Dec-2003
4
Document promoted from Target Specification to Preliminary Data status.
VCC changed to VDD and ICC to IDD.
Changed title of Table 2: Product description and page program typical
timing for NANDXXXR3A devices corrected. Table 1: NAND128-A and
NAND256-A device summary, inserted on page 2.
13-Apr-2004
5
WSOP48 and VFBGA55 packages added, VFBGA63 (9 x 11 x 1mm)
removed.
Figure 19., Cache Program Operation, modified and note 2 modified.
Note removed for tWLWH timing in Table 19: AC characteristics for
command, address, data input. Meaning of tBLBH4 modified, partly
replaced by tWHBH1 and tWHRL min for 3 V devices modified in Table 20:
References removed from Section 13: Revision history section and
reference made to ST website instead.
waveform removed. Only 00h pointer operations are valid before a cache
program operation. Note added to Figure 30: Block erase AC waveform.
Small text changes.
28-May-2004
6
TFBGA55 package added (mechanical data to be announced). 512-Mbit
dual die devices added. Figure 19., Cache Program Operation modified.
Package code changed for TFBGA63 8.5 x 15 x 1.2 mm, 6x8 ball array,
0.8 mm pitch (1-Gbit dual die devices) in Table 23: Ordering information
02-Jul-2004
7
Cache Program removed from document. TFBGA55 package
specifications added (Figure 40., TFBGA55 8 x 10mm - 6x8 active ball
array - 0.80mm pitch, Package Outline and Table 25., TFBGA55 8 x
10mm - 6x8 active ball array - 0.80mm pitch, Package Mechanical Data).
Test conditions modified for VOL and VOH parameters.
01-Oct-2004
8
Section 6.5: Block erase last address cycle modified. Definition of a bad
block modified in Section 7.1: Bad block management. RoHS compliance
Document promoted from Preliminary Data to Full Datasheet status.
03-Dec-2004
9
Automatic Page 0 Read at power-up option no longer available.
PC Demo board with simulation software removed from list of available
development tools. Section 3.5: Chip Enable (E) paragraph clarified.
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