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參數(shù)資料
| 型號： | NAND256W4A2AZA6E |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 16M X 16 FLASH 3V PROM, 12000 ns, PBGA55 |
| 封裝： | 8 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, VFBGA-55 |
| 文件頁數(shù)： | 17/58頁 |
| 文件大?。?/td> | 1406K |
| 代理商： | NAND256W4A2AZA6E |
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Device operations
NAND128-A, NAND256-A
and Chip Enable remains Low, then the next page is automatically loaded into the page
buffer and the read operation continues. A sequential row read operation can only be
used to read within a block. If the block changes a new read command must be issued.
block diagrams for details about sequential row read operations. To terminate a
sequential row read operation, set to High the Chip Enable signal for more than tEHEL.
Sequential row read is not available when the Chip Enable don’t care option is enabled.
Figure 10.
Read (A, B, C) operations
Figure 11.
Read block diagrams
1.
The highest address depends on the device density.
CL
E
W
AL
R
I/O
RB
00h/
01h/ 50h
ai07595c
Busy
Command
Code
Address Input
Data Output (sequentially)
tBLBH1
(read)
AI07596
A0-A7
A9-A26(1)
Area A
(1st half page)
Read A command, x8 devices
Area B
(2nd half page)
Area C
(spare)
Area A
(main area)
Area C
(spare)
A0-A7
Read A command, x16 devices
A0-A7
Read B command, x8 devices
Area A
(1st half page)
Area B
(2nd half page)
Area C
(spare)
A0-A3 (x8)
A0-A2 (x16)
Read C command, x8/x16 devices
Area A
Area A/ B
Area C
(spare)
A9-A26(1)
A4-A7 (x8), A3-A7 (x16) are don't care
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NAND32GAH0HZA5E | 制造商:Micron Technology Inc 功能描述:NAND EMMC - Trays |
| NAND32GAH0HZA5F | 制造商:Micron Technology Inc 功能描述:NAND EMMC - Tape and Reel |
| NAND32GAH0PZA5E | 制造商:Micron Technology Inc 功能描述:EMMC 4.3 4GB 12X16 41NM - Trays |
| NAND32GAH0PZA5F | 制造商:Micron Technology Inc 功能描述:NAND EMMC - Tape and Reel |
| NAND32GAHAKZO6E | 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Trays |
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