參數(shù)資料
型號: MX98905B
廠商: Electronic Theatre Controls, Inc.
英文描述: The MX98905 is designed for easy implementation of CSMA/CD local area networks,
中文描述: 該MX98905是專為易于實(shí)現(xiàn)的多址/光盤局域網(wǎng),
文件頁數(shù): 66/86頁
文件大小: 352K
代理商: MX98905B
66
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
REGISTER DESCRIPTION (Continued)
16. DMA REGISTERS
The DMA Registers are partitioned into three groups:
Transmit, Receive, and Remote DMA Registers, as the
diagram shows on the next page.
The Transmit group contains three registers: TPSR,
TBCR0 and TBCR1. Registers in this group are used to
initialize the Local DMA channel for transmission of
packets.
PSTART, PSTOP, CURR, BNRY, Receive Byte Counter,
CLDA0 and CLDA1 are located in the receive group. They
are used to initialize the Local DMA channel for packet
reception. Meanwhile, the Page Start, Page Stop, Current
and Boundary Registers are also used by the Buffer
Management Logic to supervise the Receive Buffer Ring.
The Remote DMA Registers are used to initialize the
Remote DMA. Six registers are included: RSAR0,
RSAR1, RBCR0, RBCR1, CRDA0 and CRDA1.
The diagram on the next page shows 8- and 16-bit
registers. For slave mode read/write, the 16-bit internal
registers are also accessed as 8-bit registers by the host.
Thus, the 16-bit Transmit Byte Count Register is broken
into two 8-bit registers, namely, TBCR0 and TBCR1.
Similarly, Remote Start Address and Remote Byte Count
are broken into RSAR0, RSAR1, and RBCR0, RBCR1.
Registers TPSR, PSTART, PSTOP, CURR and BNRY
only check or control the upper 8 bits of address informa-
tion on the bus. Thus, they are shifted to position 15-8, as
shown in the diagram on the next page.
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