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參數(shù)資料
| 型號： | MX10F202FC |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 7/47頁 |
| 文件大?。?/td> | 253K |
| 代理商： | MX10F202FC |
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15
P/N:PM0762
REV. 1.0, MAY. 22, 2003
MX10F202FC
Specifications subject to change without notice, contact your sales representatives for the most update information.
Watch Timer
The watch timer module (see Fig. 6) is clocked by 32.768KHz external crystal, and generates interrupt request
every 0.5 second. This value is derived from f
timer
= f
osc
/ (256x64). The watch timer consists of an 8-bit timer
register WTL and a 6-bit timer registers WTH. The WTL register is triggered by the 32.768KHz external crystal, and
the WTH register increases its value while WTL overflow occurs. When the overflow of WTH occurs, the WTF bit in
SFR INTCON is set High automatically and an interrupt request is sent to the microcontroller.
Both of the timer registers WTL and WTH can be loaded values by software. Therefore the time interval of the
watch timer interrupt request can be adjusted. This allows the watch timer to send interrupt request more frequently
for some special application.
The WTF can be set both by hardware and software, but it can only be cleared by software. The 32.768KHz
external oscillator is gated by the WTR bit in SFR INTCON. If WTR is cleared, the watch timer registers will hold
their values.
In the idle and sleep states the watch timer remains active, and it wakes up the microcontroller while the watch
timer overflow (i.e. WTF is set HIGH) occurs.
Since this module is clocked by the 32.768KHz external crystal, this module is disabled and consumes no power if
there is no such crystal connected to the chip.
Fig. 6 Watch Timer
Internal Bus
Write WTF, WTL, WTH
Interrupt
Request
WTR
OSC
32.768K
WTH
(6-bit)
Load
WTF
(1-bit)
Load
WTL
(8-bit)
Load
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