參數(shù)資料
型號(hào)： MT92220
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： 1023 Channel Voice Over IP/AAL2 Processor
中文描述： ATM NETWORK INTERFACE, PBGA608
封裝： 31 X 31 MM, 2.50 MM HEIGHT, MS-034, EPBGA-608
文件頁(yè)數(shù)： 118/210頁(yè)
文件大?。?/td> 1536K
代理商： MT92220
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Data Sheet
MT92220
118
Zarlink Semiconductor Inc.
RSO
Reset Total Slip Offset Delta when the next packet is received. When this bit is
set by software, the next packet to be processed by the PDV monitoring block
will cause the Total Slip Offset Delta to be reset to zero. The hardware will clear
this bit immediately after the Desired Remote/Local Time Stamp delta has been
applied.
RSL
Reset Total Slip Offset Delta when the next packet is received after a significant
silence period. When this bit is set by software, the next packet processed by the
PDV monitoring block after a long period on inactivity (as defined by the Min Slip
field) will cause the Total Slip Offset Delta to be reset to zero. The hardware will
clear this bit immediately after the Desired Remote/Local Time Stamp Delta has
been applied.
RSM
Reset Total Slip Offset Delta when the next packet is received with the RTP
marker bit set. When this bit is set by software, the next packet to be processed
by the PDV monitoring block and whose RTP marker bit is set will cause the Total
Slip Offset Delta to be reset to zero. The hardware will clear this bit immediately
after the Desired Remote/Local Time Stamp delta has been applied.
Min Slip
This field defines how many frames of lost data are considered enough to identify
the gap as a silence period in order to cause the Total Slip Offset Delta to be
reset when the RSL bit is set.
“000” = 16 frames;
“001” = 32 frames;
“010” = 64 frames;
“011” = 128 frames;
“100” = 256 frames;
“101” = 512 frames;
“110” = 1024 frames;
“111” = 2048 frames.
IIL
Init with Init Lead. When this bit is set and a packet is received with the I2 bit
cleared, the Total Slip Offset Delta will be set to the shortest allowed delay
between the remote and local time stamp plus the Init Lead programmed in the
RX RTP Disassembly Extension Structure. When this bit is cleared, the Desired
Remote/Local Time Stamp Delta will be assumed to be correct and the normal
underrun/overrun slipping will take place.
I2
Init bit. This bit must be written to zero by software when the structure is
initialized. When the first packet is processed by this structure, the I2 bit will be
written back to ‘1’ by the hardware.
Last Packet Remote Time
Stamp
32-bit time stamp at which the packet was sent by the remote end (i.e. the RTP
time stamp). When the RTP protocol is not present, this field simply increments
by the number of frames received in the last packet. This “emulates” an RTP time
stamp when no packet loss, misinsertion or silence suppression has occurred
since the last packet arrival.
Total Slip Offset Delta
This value is the current number of frames either added or dropped due to
overruns and underruns. A positive number represents overruns and a negative
number represents underruns. Note that underrun frames and overruns frames
cancel-out in this field.
Field
Description
Table 48 - Fields and Description (continued)
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MT9234MU-CDC-CP 功能描述:MODEM V.92 DATA/FAX USB WORLD 25 RoHS:是 類(lèi)別:計(jì)算機(jī)，辦公室 - 元件，配件 >> 調(diào)制解調(diào)器 系列:MultiMobile™ USB 標(biāo)準(zhǔn)包裝:1 系列:MultiModem® ZBA 數(shù)據(jù)格式:V.34，V.92 波特率:- 電源電壓:- 安裝類(lèi)型:臺(tái)式 封裝/外殼:5.7" L x 4.3" W x 1.0" H（145mm x 109mm x 25mm） 供應(yīng)商設(shè)備封裝:- 包裝:散裝
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