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參數(shù)資料
| 型號(hào)： | MT46V32M8FG-6TIT:G |
| 元件分類： | DRAM |
| 英文描述： | 32M X 8 DDR DRAM, 0.7 ns, PBGA60 |
| 封裝： | (8 X 14) MM, PLASTIC, FBGA-60 |
| 文件頁(yè)數(shù)： | 45/93頁(yè) |
| 文件大?。?/td> | 3632K |
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PDF: 09005aef80768abb/Source: 09005aef82a95a3a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDR_x4x8x16_Core1.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
4
2003 Micron Technology, Inc. All rights reserved.
256Mb: x4, x8, x16 DDR SDRAM
State Diagram
Figure 2:
Simplified State Diagram
Note:
This diagram represents operations within a single bank only and does not capture concur-
rent operations in other banks.
Power
on
Power
applied
REFS
LMR
REFA
REFSX
ACT
CKE LOW
CKEL
CKE HIGH
CKEH
PRE
Precharge
all banks
MR
EMR
Self
refresh
Idle
all banks
precharged
Row
active
Burst
stop
Read
Read A
Automatic sequence
Command sequence
Write
WRITE
Write A
WRITE A
Precharge
PREALL
Active
power-
down
Precharge
power-
down
Auto
refresh
PRE
WRITE A
READ A
PRE
READ A
READ
BST
ACT = ACTIVE
BST = BURST TERMINATE
CKEH = Exit power-down
CKEL = Enter power-down
EMR = Extended mode register
LMR = LOAD MODE REGISTER
MR = Mode register
PRE = PRECHARGE
PREALL = PRECHARGE all banks
READ A = READ with auto precharge
REFA = AUTO REFRESH
REFS = Enter self refresh
REFSX = Exit self refresh
WRITE A = WRITE with auto precharge
PRE
LMR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT46V32M8BG-6AT:G | 32M X 8 DDR DRAM, 0.7 ns, PBGA60 |
| M29F800FB55N3E2 | 512K X 16 FLASH 5V PROM, 55 ns, PDSO48 |
| MC12L1NZGF | ROTARY SWITCH-12POSITIONS, SP12T, LATCHED, 0.25A, 28VDC, PANEL MOUNT-THREADED |
| MD00S1NCQF | ROTARY SWITCH-6POSITIONS, DP6T, LATCHED, 0.25A, 28VDC, THROUGH HOLE-STRAIGHT |
| MD06L1NZGD | ROTARY SWITCH-6POSITIONS, DP6T, LATCHED, 0.25A, 28VDC, PANEL MOUNT-THREADED |
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參數(shù)描述 |
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