參數(shù)資料
型號: MT18VDVF6472DG-262XX
元件分類: DRAM
英文描述: 64M X 72 DDR DRAM MODULE, 0.75 ns, DMA184
封裝: DIMM-184
文件頁數(shù): 7/38頁
文件大?。?/td> 713K
代理商: MT18VDVF6472DG-262XX
PDF: 09005aef81c73825/Source: 09005aef81c73837
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DVF18C64_128x72D_2.fm - Rev. A 8/05 EN
15
2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
512MB, 1GB: (x72, DR) 184-Pin DDR VLP RDIMM
Extended Mode Register
DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power-
up initialization and upon returning to normal operation after having disabled the DLL
for the purpose of debug or evaluation. When the device exits self refresh mode, the DLL
is enabled automatically. Any time the DLL is enabled, 200 clock cycles with CKE HIGH
must occur before a READ command can be issued.
Figure 6:
Extended Mode Register Definition Diagram
Notes: 1. BA1 and BA0 (E14 and E13) must be “0, 1” to select the Extended Mode Register (vs. the
base Mode Register).
2. QFC# is not supported.
Operating Mode
Reserved
0
0
Valid
0
1
DLL
Enable
Disable
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
9
7
65
4
3
8
2
1
0
E0
0
Drive Strength
Normal
E1
E0
E1,
Operating Mode
A10
A11
A12
BA1 BA0
10
11
12
13
14
E3
E4
0
0
0
0
0
E6 E5
E7
E8
E9
0
0
E10
E11
0
E12
DS
0
E22
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