參數(shù)資料
型號: MT18HTF12872DG-40EXX
元件分類: DRAM
英文描述: 128M X 72 DDR DRAM MODULE, 0.6 ns, DMA240
封裝: DIMM-240
文件頁數(shù): 7/35頁
文件大小: 717K
代理商: MT18HTF12872DG-40EXX
512MB, 1GB, 2GB (x72, DR, REGISTERED)
PC2-3200, PC2-4300, 240-Pin DDR2 SDRAM DIMM
PRELIMINARY
09005aef80e934a6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
HTF18C64_128_256x72DG_A.fm - Rev. A 10/03 EN
15
2003 Micron Technology. Inc.
Extended Mode Register 2 (EMR2)
The Extended Mode Register 2 (EMR2) controls
functions beyond those controlled by the mode regis-
ter. Currently all bits in EMR2 are reserved as shown in
Figure 10. The EMR2 is programmed via the LOAD
MODE command and will retain the stored informa-
tion until it is programmed again or the device loses
power. Reprogramming the extended mode register
will not alter the contents of the memory array, pro-
vided it is performed correctly.
The extended mode register must be loaded when
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time tMRD
before initiating any subsequent operation. Violating
either of these requirements could result in unspeci-
fied operation.
Figure 10: Extended Mode Register 2
(EMR2) Definition
NOTE:
2GB extended mode register TBD.
Extended Mode Register Set 3 (EMR3)
The Extended Mode Register 3 (EMR3) controls
functions beyond those controlled by the mode regis-
ter. Currently all bits in EMR3 are reserved as shown in
Figure 11. The EMR3 is programmed via the LOAD
MODE command and will retain the stored informa-
tion until it is programmed again or the device loses
power. Reprogramming the extended mode register
will not alter the contents of the memory array, pro-
vided it is performed correctly.
The extended mode register must be loaded when
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time tMRD
before initiating any subsequent operation. Violating
either of these requirements could result in unspeci-
fied operation.
Figure 11: Extended Mode Register 3
(EMR3) Definition
NOTE:
2GB extended mode register TBD.
A9
A7 A6 A5 A4 A3
A8
A2
A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
A10
A12 A11
BA0
BA1
10
11
12
13
* E12 (A12)–E0 (A0) are reserved for future use and must all be programmed to '0.'
14
EMR(2) 0* 0*
0*
0* 0* 0* 0* 0* 0* 0* 0*
0* 0*
A9
A7 A6 A5 A4 A3
A8
A2
A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
A10
A12 A11
BA0
BA1
10
11
12
13
0*
14
* E13 (A13) - E0 (A0) are reserved for future
use and must all be programmed to '0'.
15
A13
0
1
0
1
Mode Register Definition
Mode Register (MR)
Extended Mode Register (EMR)
Extended Mode Register (EMR2)
Extended Mode Register (EMR3)
M15
0
0
1
M14
EMR2
0*
0* 0* 0* 0* 0* 0* 0* 0*
0* 0*
512MB Address Bus
1GB Address Bus
A9
A7 A6 A5 A4 A3
A8
A2
A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
A10
A12 A11
BA0
BA1
10
11
12
13
* E12 (A12)–E0 (A0) are reserved for future use and must all be programmed to '0.'
14
EMR(3) 0* 0*
0*
0* 0* 0* 0* 0* 0* 0* 0*
0* 0*
A9
A7 A6 A5 A4 A3
A8
A2
A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
A10
A12 A11
BA0
BA1
10
11
12
13
0*
14
* E13 (A13) - E0 (A0) are reserved for future
use and must all be programmed to '0'.
15
A13
0
1
0
1
Mode Register Definition
Mode Register (MR)
Extended Mode Register (EMR)
Extended Mode Register (EMR2)
Extended Mode Register (EMR3)
M15
0
0
1
M14
EMR3
0*
0* 0* 0* 0* 0* 0* 0* 0*
0* 0*
512MB Address Bus
1GB Address Bus
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