參數(shù)資料
型號: MSM9225BGA-2K
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 30/95頁
文件大?。?/td> 567K
代理商: MSM9225BGA-2K
MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 23
2.4.4 CAN Bus Timing Register 0 (BTR0: 1Fhex)
The MSM9225B has an internal baud rate prescaler that generates the BTL (Bit Timing Logic) signal by
dividing the system clock by a factor of 1 to 64. BTL is the system clock for the communication function.
The register BTR0 sets the baud rate prescaler and the SJW width.
Writing to BTR0 is enabled only when the initialization bit INIT of the CAN control register (CANC: 0Ehex)
has been set to “1”.
The bit configuration is shown below.
MSB
SJWB SJWA BRP5 BRP4 BRP3 BRP2 BRP1 BRP0
LSB
BTR0 (1Fhex), *R/W: R/W
Initial
value:
00
BRP5 BRP4 BRP3 BRP2 BRP1 BRP0
BTL Cycle time
00
1
× system clock period
00
01
2
× system clock period
11
10
63
× system clock period
11
64
× system clock period
System clock: the clock 1/2 the frequency of the oscillator clock.
SJWB SJWA
SJW1, SJW2
00
1
× BTL cycle
01
2
× BTL cycle
10
3
× BTL cycle
11
4
× BTL cycle
Figure 2-23 CAN Bus Timing Register 0 (BTR0)
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