![](http://datasheet.mmic.net.cn/330000/MSM7662_datasheet_16442494/MSM7662_30.png)
Semiconductor
MSM7662
30/47
INTERNAL REGISTERS
Register List
D7
MRA7
MRB7
MRC7
HSYT7
STHR7
HSDL7
HVALID7
VVALID7
LUMC7
AGCLF7
SSEPL7
CHRC7
ACCLF7
HUE7
OPCY7
D6
D5
D4
Data byte
D3
D2
D1
D0
Sub-
address
Register Function
Mode Register A (MRA)
Mode Register B (MRB)
Mode Register C (MRC)
Horizontal Sync Trimmer (HSYT)
Sync Threshold level adjust (STHR)
Horizontal Sync Delay (HSDL)
Horizontal Valid Trimmer (HVALT)
Vertical Valid Trimmer (VVALT)
Luminance Control (LUMC)
AGC/Pedestal Loop filter Control (AGCLF)
Sync separation level (SSEPL)
Chrominance Control (CHRC)
ACC Loop filter Control (ACCLF)
Hue Control (HUE)
OMR7
ADC17
ADC27
ADC37
ZLD7
STATUS7
Output phase Control for Data Y (OPCY)
MRA6
MRB6
MRC6
HSYT6
STHR6
HSDL6
HVALID6
VVALID6
LUMC6
AGCLF6
SSEPL6
CHRC6
ACCLF6
HUE6
OPCY6
OMR6
ADC16
ADC26
ADC36
ZLD6
STATUS6
MRA5
MRB5
MRC5
HSYT5
STHR5
HSDL5
HVALID5
VVALID5
LUMC5
AGCLF5
SSEPL5
CHRC5
ACCLF5
HUE5
OPCY5
OMR5
ADC15
ADC25
ADC35
ZLD5
STATUS5
MRA4
MRB4
MRC4
HSYT4
STHR4
HSDL4
HVALID4
VVALID4
LUMC4
AGCLF4
SSEPL4
CHRC4
ACCLF4
HUE4
OPCY4
OMR4
ADC14
ADC24
ADC34
ZLD4
STATUS4
MRA3
MRB3
MRC3
HSYT3
STHR3
HSDL3
HVALID3
VVALID3
LUMC3
AGCLF3
SSEPL3
CHRC3
ACCLF3
HUE3
OPCY3
OMR3
ADC13
ADC23
ADC33
ZLD3
STATUS3
MRA2
MRB2
MRC2
HSYT2
STHR2
HSDL2
HVALID2
VVALID2
LUMC2
AGCLF2
SSEPL2
CHRC2
ACCLF2
HUE2
OPCY2
OMR2
ADC12
ADC22
ADC32
ZLD2
STATUS2
MRA1
MRB1
MRC1
HSYT1
STHR1
HSDL1
HVALID1
VVALID1
LUMC1
AGCLF1
SSEPL1
CHRC1
ACCLF1
HUE1
OPCY1
OMR1
ADC11
ADC21
ADC31
ZLD1
STATUS1
MRA0
MRB0
MRC0
HSYT0
STHR0
HSDL0
HVALID0
VVALID0
LUMC0
AGCLF0
SSEPL0
CHRC0
ACCLF0
HUE0
OPCY0
OMR0
ADC10
ADC20
ADC30
ZLD0
STATUS0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14
OPCC7
Output phase Control for Data C (OPCC)
Optional Mode Register (OMR)
OPCC6
OPCC5
OPCC4
OPCC3
OPCC2
OPCC1
OPCC0
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
/Read
ADC register (ADC1)
ADC register (ADC2)
ADC register (ADC3)
Stataus register (STATUS)
20
Read
0 level detect register (ZLD)