參數(shù)資料
型號(hào)： MSM7662
廠商： OKI SEMICONDUCTOR CO., LTD.
英文描述： NTSC/PAL Digital Video Decoder(NTSC/PAL制式數(shù)字視頻譯碼器)
中文描述： NTSC / PAL數(shù)字視頻解碼器（的NTSC / PAL制式數(shù)字視頻譯碼器）
文件頁(yè)數(shù)： 29/48頁(yè)
文件大?。?/td> 369K
代理商： MSM7662
Semiconductor
MSM7662
29/47
OPERATING MODE SETTING
There are two types of video mode settings.
1. External pin mode: direct setting from dedicated pins
2. Register setting mode: specification by internal register settings
These modes can be switched by the mode register MRA[0].
The reset state (default) is the external pin mode.
The following registers can be set in the external pin mode.
MRA[3:1]
Input signal mode
*000: NTSC ITU-RBT.601
001: NTSC Square Pixel
010: NTSC 4fsc
100: PAL ITU-RBT.601
101: PAL Square Pixel
00: ITU-R BT.656 (SAV, EAV, blank processing)
*01: 8 bit (Y CbCr)
HSYNC_L and VSYNC_L used for
synchronization
10: ITU-R BT.601 16 bit (8 bit Y, 8 bit CbCr)
11: RGB (8 bit R, 8 bit G, 8 bit B)
13.5 MHz
12.27 MHz
14.31818 MHz
13.5 MHz
14.75 MHz
MRA[7:6]
Output mode
Note:
NTSC 4fsc cannot be set externally.
Pin Setting Example
NTSC, 27 MHz (ITU-RBT.601), Composite input, 8-bit (YCbCr) Output
Notes
Condition
Pin name
0 : ITU-RBT.656 01 : 8-bit (YCbCr)
10 : 16-bit (Y + CbCr) 11 : RGB
0 : NTSC 1 : PAL
0 : ITU-RBT.601 1 : Square Pixel
0 : twice the pixel frequency 1 : pixel frequency
= low
= high
= low
= low
= low
= low
= low
= low
= low
= low
=
= low
= low
=
MODE[3]
MODE[2]
MODE[1]
MODE[0]
CLKSEL
PLLSEL
INS[2:0]
GAINS[2:0]
TEST[2:0]
SCAN
M[2]
M[1]
M[0]
SLEEP
Normally set to a low level
Normally set to a low level
0 : normal operation 1 : sleep operation
: low = 1000001, : high = 1000011
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