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Semiconductor
MSM7662
1/47
NTSC/PAL Digital Video Decoder
GENERAL DESCRIPTION
The MSM7662 is an LSI device that decodes NTSC or PAL analog video signals into YCbCr and
RGB digital data based on ITU-RBT.601.
The device has built-in two channels of A/D converters and can accept composite video and S
video signals for the input video signals. Composite video signals are converted to YCbCr and
RGB digital data via the 2-dimensional Y/C separation circuit with an adaptive filter.
Analog video signals can be sampled by a clock at the pixel frequency or at twice the pixel
frequency. A decimation filter is built-in for sampling at twice the pixel frequency.
Input signals are synchronized internally and high-speed locking for color burst is possible.
Because a FIFO buffer is built into the output format circuit, jitter-free output can be obtained
even for non-standard signals.
FEATURES ( new feature not found on MSM7661)
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Input analog signal
NTSC/PAL composite video signal or S-video signal
5 composite, 2 S-video analog inputs (switchable)
Built-in clamp circuits and video amps
Built-in 8-bit A/D converters (2 channels; sampling frequency: 40 MHz)
4 selectable output interfaces
ITU-RBT.656 (conditional), 8-bit (YCbCr), 8-bit (Y) + 8-bit (CbCr)
YCbCr = 4 : 2 : 2, YCbCr = 4 : 1 : 1 (limit)
24-bit RGB
RGB = 4 : 4 : 4
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2-dimensional Y/C separation using adaptive comb filter (this filter is bypassed for S-video
signal input)
NTSC format: 3 lines or 2 lines, PAL format: 2 lines (3 virtual lines)
Selectable input signal synchronization
4 synchronization modes: FIFO-1, FIFO-2, FM-1, FM-2 (FIFO-1 is normally selected)
(FIFO-1 and FIFO-2 use the internal FIFO, FM-1 and FM-2 use external field memory)
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Compatible pixel frequencies
13.5 MHz (ITU-RBT.601), 12.27 MHz (NTSC Square Pixel)
14.31818 MHz (NTSC 4fsc), 14.45 MHz (PAL Square Pixel)
Built-in AGC/ACC circuits, compatible with a wide range of input levels
Input level range: –8 dB to +3.5 dB
Switchable between AGC/MGC (fixed gain) and ACC/MCC (fixed gain)
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Decimation filter built into input stage, allows easy configuration of filter prior to A/D
converter
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Automatic NTSC/PAL recognition (only for ITU-RBT.601)
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Sleep mode
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Multiplex signal recognition (closed caption)
During vertical blanking interval, data is output as 8-bit data.
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I
2
C-bus interface
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3.3 V single power supply (I/O 5 V tolerance)
Package:
100-pin plastic TQFP (TQFP100-P-1414-0.50-K) (Product name: MSM7662TB)
Peimnay
E2F0020-18-91
This version: Sep. 1998