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參數(shù)資料
| 型號： | MSC8254TVT800B |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 0-BIT, OTHER DSP, PBGA783 |
| 封裝： | 29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783 |
| 文件頁數(shù)： | 22/68頁 |
| 文件大?。?/td> | 909K |
| 代理商： | MSC8254TVT800B |
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Electrical Characteristics
MSC8254 Quad-Core Digital Signal Processor Data Sheet, Rev. 4
Freescale Semiconductor
29
Using this waveform, the definitions are listed in Table 10. To simplify the illustration, the definitions assume that the SerDes
transmitter and receiver operate in a fully symmetrical differential signaling environment.
To illustrate these definitions using real values, consider the example of a current mode logic (CML) transmitter that has a
common mode voltage of 2.25 V and outputs, TD and TD. If these outputs have a swing from 2.0 V to 2.5 V, the peak-to-peak
voltage swing of each signal (TD or TD) is 500 mV p-p, which is referred to as the single-ended swing for each signal. Because
the differential signaling environment is fully symmetrical in this example, the transmitter output differential swing (VOD) has
the same amplitude as each signal single-ended swing. The differential output signal ranges between 500 mV and –500 mV. In
other words, VOD is 500 mV in one phase and –500 mV in the other phase. The peak differential voltage (VDIFFp) is 500 mV.
The peak-to-peak differential voltage (VDIFFp-p) is 1000 mV p-p.
Table 10. Differential Signal Definitions
Term
Definition
Single-Ended Swing
The transmitter output signals and the receiver input signals SR[1–2]_TX, SR[1–2]_TX, SR[1–2]_RX
and SR[1–2]_RX each have a peak-to-peak swing of A – B volts. This is also referred to as each
signal wire’s single-ended swing.
Differential Output Voltage, VOD (or
Differential Output Swing):
The differential output voltage (or swing) of the transmitter, VOD, is defined as the difference of the
two complimentary output voltages: VSR[1–2]_TX – VSR[1–2]_TX. The VOD value can be either positive
or negative.
Differential Input Voltage, VID (or
Differential Input Swing)
The differential input voltage (or swing) of the receiver, VID, is defined as the difference of the two
complimentary input voltages: VSR[1–2]_RX – VSR[1–2]_RX. The VID value can be either positive or
negative.
Differential Peak Voltage, VDIFFp
The peak value of the differential transmitter output signal or the differential receiver input signal is
defined as the differential peak voltage, VDIFFp = |A – B| volts.
Differential Peak-to-Peak, VDIFFp-p
Since the differential output signal of the transmitter and the differential input signal of the receiver
each range from A – B to –(A – B) volts, the peak-to-peak value of the differential transmitter output
signal or the differential receiver input signal is defined as differential peak-to-peak voltage,
VDIFFp-p =2 × VDIFFp = 2 × |(A – B)| volts, which is twice the differential swing in amplitude, or twice
of the differential peak. For example, the output differential peak-peak voltage can also be calculated
as VTX-DIFFp-p = 2 × |VOD|.
Differential Waveform
The differential waveform is constructed by subtracting the inverting signal (SR[1–2]_TX, for
example) from the non-inverting signal (SR[1–2]_TX, for example) within a differential pair. There is
only one signal trace curve in a differential waveform. The voltage represented in the differential
waveform is not referenced to ground. Refer to Figure 16 as an example for differential waveform.
Common Mode Voltage, Vcm
The common mode voltage is equal to half of the sum of the voltages between each conductor of a
balanced interchange circuit and ground. In this example, for SerDes output,
Vcm_out =(VSR[1–2]_TX +VSR[1–2]_TX) ÷ 2 = (A + B) ÷ 2, which is the arithmetic mean of the two
complimentary output voltages within a differential pair. In a system, the common mode voltage may
often differ from one component’s output to the other’s input. It may be different between the receiver
input and driver output circuits within the same component. It is also referred to as the DC offset on
some occasions.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MSC8256 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Six-Core Digital Signal Processor |
| MSC8256_11 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Six-Core Digital Signal Processor |
| MSC8256ETAG1000B | 制造商:Freescale Semiconductor 功能描述:DSP,STARCORE, 6-CORE - Bulk |
| MSC8256SAG1000B | 制造商:Freescale Semiconductor 功能描述:DSP,STARCORE,6-CORE R2.1 - Bulk |
| MSC8256SVT1000B | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSPStarcore6-core R2.1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
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