參數(shù)資料
型號: MQ80C52XXX-36/883
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44
封裝: CERAMIC, QFP-44
文件頁數(shù): 53/152頁
文件大小: 2528K
代理商: MQ80C52XXX-36/883
146
2486AA–AVR–02/2013
ATmega8(L)
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM bit. The
MPCM bit shares the same I/O location as the TXC Flag and this might accidentally be cleared
when using SBI or CBI instructions.
Accessing
UBRRH/UCSRC
Registers
The UBRRH Register shares the same I/O location as the UCSRC Register. Therefore some
special consideration must be taken when accessing this I/O location.
Write Access
When doing a write access of this I/O location, the high bit of the value written, the USART Reg-
ister Select (URSEL) bit, controls which one of the two registers that will be written. If URSEL is
zero during a write operation, the UBRRH value will be updated. If URSEL is one, the UCSRC
setting will be updated.
The following code examples show how to access the two registers.
Note:
As the code examples illustrate, write accesses of the two registers are relatively unaffected of
the sharing of I/O location.
Assembly Code Examples(1)
...
; Set UBRRH to 2
ldi
r16,0x02
out
UBRRH,r16
...
; Set the USBS and the UCSZ1 bit to one, and
; the remaining bits to zero.
ldi
r16,(1<<URSEL)|(1<<USBS)|(1<<UCSZ1)
out
UCSRC,r16
...
C Code Examples
...
/* Set UBRRH to 2 */
UBRRH = 0x02;
...
/* Set the USBS and the UCSZ1 bit to one, and */
/* the remaining bits to zero. */
UCSRC = (1<<URSEL)|(1<<USBS)|(1<<UCSZ1);
...
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