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參數(shù)資料
| 型號： | MQ80C52XXX-36/883 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁數(shù)： | 25/152頁 |
| 文件大?。?/td> | 2528K |
| 代理商： | MQ80C52XXX-36/883 |
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120
2486AA–AVR–02/2013
ATmega8(L)
Timer/Counter
Prescaler
Figure 56. Prescaler for Timer/Counter2
The clock source for Timer/Counter2 is named clk
T2S. clkT2S is by default connected to the main
system I/O clock clk
I/O. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously
clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real Time Counter
(RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from Port B. A crystal can
then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock
source for Timer/Counter2. The Oscillator is optimized for use with a 32.768kHz crystal. Apply-
ing an external clock source to TOSC1 is not recommended.
For Timer/Counter2, the possible prescaled selections are: clk
T2S/8, clkT2S/32, clkT2S/64,
clk
T2S/128, clkT2S/256, and clkT2S/1024. Additionally, clkT2S as well as 0 (stop) may be selected.
Setting the PSR2 bit in SFIOR resets the prescaler. This allows the user to operate with a pre-
dictable prescaler.
Special Function IO
Register – SFIOR
Bit 1 – PSR2: Prescaler Reset Timer/Counter2
When this bit is written to one, the Timer/Counter2 prescaler will be reset. The bit will be cleared
by hardware after the operation is performed. Writing a zero to this bit will have no effect. This bit
will always be read as zero if Timer/Counter2 is clocked by the internal CPU clock. If this bit is
written when Timer/Counter2 is operating in Asynchronous mode, the bit will remain one until
the prescaler has been reset.
10-BIT T/C PRESCALER
TIMER/COUNTER2 CLOCK SOURCE
clk
I/O
clk
T2S
TOSC1
AS2
CS20
CS21
CS22
clk
T2S
/8
clk
T2S
/64
clk
T2S
/128
clk
T2S
/1024
clk
T2S
/256
clk
T2S
/32
0
PSR2
Clear
clk
T2
Bit
7
6
5
4
3
2
1
0
–
ACME
PUD
PSR2
PSR10
SFIOR
Read/Write
R
R/W
Initial Value
0
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