參數(shù)資料
型號: MPC9991FA
廠商: MOTOROLA INC
元件分類: 時鐘及定時
英文描述: PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
封裝: PLASTIC, LQFP-52
文件頁數(shù): 3/11頁
文件大小: 144K
代理商: MPC9991FA
MPC9991
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
298
Table 10: Confidence Facter CF
CF
Probability of clock edge within the distribution
± 1s
0.68268948
± 2s
0.95449988
± 3s
0.99730007
± 4s
0.99993663
± 5s
0.99999943
± 6s
0.99999999
The feedback trace delay is determined by the board layout
and can be used to fine-tune the effective delay through each
device. In the following example calculation a I/O jitter confi-
dence factor of 99.7% (
± 3s) is assumed, resulting in a worst
case timing uncertainty from input to any output of -345 ps to
345 ps1 relative to CCLK:
tSK(PP) =
[–150ps...150ps] + [–150ps...150ps] +
[(15ps
@ –3)...(15ps @ 3)] + tPD, LINE(FB)
tSK(PP) =
[–345ps...345ps] + tPD, LINE(FB)
Due to the frequency dependence of the I/O jitter, Figure 8
“Max. I/O Jitter versus frequency” can be used for a more pre-
cise timing performance analysis.
Figure 8. Max. I/O Jitter versus frequency
TBD
See MPC961C application section for
an example I/O jitter characteristics
Figure 9. MPC9991 AC test reference
Differential
Pulse Generator
Z = 50W
RT = 50
ZO = 50
DUT MPC9991
VTT
RT = 50
ZO = 50
VTT
2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC9992 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3 DIFFRERENTIAL ECL/PECL PLL CLOCK GENERATOR
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