參數(shù)資料
型號(hào)： MPC9894VFR2
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘及定時(shí)
英文描述： 9894 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA100
封裝： 11 X 11 MM, MAPBGA-100
文件頁(yè)數(shù)： 3/28頁(yè)
文件大小： 362K
代理商： MPC9894VFR2
Advanced Clock Drivers Devices
Freescale Semiconductor
11
MPC9894
I2C INTERFACE AND CONFIGURATION/STATUS REGISTERS
The following tables summarize the bit configurations for
the registers accessible via the I2C interface. The register
values are read or written over the I2C interface by the I2C
Master. This sequence starts with the I2C start command,
followed by the I2C device address and read/write byte. This
is then followed by the address of the register that is to be
accessed. In the case of a write, the register address byte is
followed by the data to be written to that register. In the case
of a read, the device will then respond with the data from that
register. At the conclusion of the transfer an I2C Stop
command is issued by the Master to terminate the transfer.
For a complete description of the I2C protocol refer to the v2.1
I2C specification.
Table 10 lists the registers that are accessible via the I2C
interface.
Boot Mode
When the I2C boot mode is activated on power-up or reset
via the MBOOT pin, the entire set of writable configuration
registers are written with a 6-byte sequence. This sequence
starts with the Output Configuration Register, and is followed
by the Mode Configuration and Alarm Reset Register, the
Device Configuration and Output Clock Enable Register, the
Input and Feedback Divider Configuration Register, the
Output Power-Up Register and the Feedback Power-Up
Register. This equates to the register sequence of 1, 2, 3, 4,
6, 7. This sequence starts with the start command, the device
select and read/write(write) byte, followed by the beginning
byte address for reading from the EEPROM. This is then
followed by the start command, device select and read/write
(read) and four current address read bytes. The device
address is the binary 7-bit value of 1010000. This I2C
sequence is compatible with industry standard I2C bus
EEPROMs such as STMicroelectronics M24C01, or
equivalent.
Slave Address Register
The Slave Address register contains the I2C address that
is used to determine if the data on the I2C interface is
addressed to this device. The seven-bit address is
determined with the fixed value of binary 1101 followed by
variable bits that are obtained from the three address pins.
The three input pins allow for 8 different addresses for a given
clock generator, allowing up to 8 clock generators to be
addressed on a single I2C interface.
Table 10. I2C Registers
Address
Register
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Start
Write
Start
Read
Stop
ACK
NoACK
Dev Selection
Data Out
Byte Addr
Figure 4. Boot Mode Random Access Read
Table 11. Slave Address (Register 0 — Read Only)
Bit
76543
210
Description
not used
ADDR_6
ADD_R5
ADDR_4
ADDR_3
ADDR_2
read from
ADDR[2] pin
ADDR_1
read from
ADR[1] pin
ADDR_0
read from
ADDR[0] pin
Reset default
1101
Preset default
1101
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