Communication Processor Module
16-294
MPC823 USER’S MANUAL
MOTOROLA
SCC2
COMMUNICATION
16
PROCESSOR
MODULE
17. Write 0x00009980 to the GSMR_H to configure the transparent channel. The CDS
and CTSS bits must be set to one. The TDCR, RDCR, RENC, and TENC fields must
be set to zero.
18. Write 0x00000000 to the GSMR_L. Normal operation of the transmit clock is used (TCI
bit is cleared). Notice that the transmitter (ENT) and receiver (ENR) have not been
enabled yet.
19. Write 0x031c to the IRSIP register. When working with Timer 2 as the SIP trigger, the
value should be 0x231c.
20. Write 0x0005 to the IRMODE register to enable the infra-red and to set the mode of
operation to high speed.
21. Program TMR2 register when working with Timer 2 as the SIP trigger.
22. Write 0x00000030 to the GSMR_L to enable the SCC2 transmitter and receiver. This
additional write ensures that the ENT and ENR bits will be enabled last.
16.9.21 The SCC2 in Transparent Mode
The SCC2 in Transparent mode allows serial data to be transmitted and received over the
serial communication controller without any modification to the datastream. Transparent
mode provides a clear channel on which the serial communication controller does not
perform bit-level manipulation. Any protocol that uses the transparent mode must have a
software layer that loads the parameters. SCC2 in Transparent mode functions as a
high-speed serial-to-parallel and parallel-to-serial converter. This mode is also referred to
as a totally transparent or promiscuous operation.
There are several basic applications for transparent mode. First, some data needs to be
moved serially, but requires no superimposed protocol. Second, some board-level
applications require a serial-to-parallel and parallel-to-serial conversion that allows
communication between chips on the same board. Third, some applications require the data
to be switched without interfering with the protocol encoding itself. For instance, in a
multiplexer, data from a high-speed time-multiplexed serial stream is multiplexed into
multiple low-speed datastreams. The objective is to switch the data path without altering the
protocol encoded on that data path.
By appropriately setting the GSMR_L, the SCC2 channels can be configured to function in
Transparent mode. The MPC823 receives and transmits the entire serial bitstream
transparently. This mode is configured by selecting the TTX and TRX bits in the GSMR_H
for the transmitter and receiver, respectively. However, both bits must be set for full-duplex
transparent operation.
Note: After 5 bytes have been transmitted, the TX buffer descriptor is automatically
closed. Once a complete frame is received, the RX buffer descriptor is closed.
Any data received after 16 bytes or a single frame causes a busy (out-of-buffers)
condition since only one RX buffer descriptor is prepared.