參數(shù)資料
型號(hào): MPC107APX66L0
廠商: MOTOROLA INC
元件分類: 外設(shè)及接口
英文描述: MULTIFUNCTION PERIPHERAL, PPGA503
封裝: PLASTIC, BGA-503
文件頁數(shù): 44/46頁
文件大?。?/td> 585K
代理商: MPC107APX66L0
MPC107 Hardware Specifications (Rev 0.2)
7
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
Electrical and Thermal Characteristics
1.4.1.2 Recommended Operating Conditions
Table 2 provides the recommended operating conditions for the MPC107.
Table 2. Recommended Operating Conditions
Characteristic1
Symbol
Recommended
Value
Unit
Notes
Supply Voltage
Vdd
2.5
± 5%
V
5
Supply Voltages for Memory Bus Drivers
GVdd
3.3
± 5%
V
7
Supply Voltages for Processor Bus Drivers
BVdd
3.3
± 5%
V
7
I/O Buffer supply for PCI and Standard
OVdd
3.3
± 0.3
V
5
PLL Supply Voltage
AVdd
2.5
± 5%
V
6
DLL Supply Voltage
LAVdd
2.5
± 5%
V
6
PCI Reference
LVdd
5.0
± 5%
V
8,9
3.3
± 0.3
V
8,9
Input Voltage
PCI Inputs
VIN
0 to 3.6 or 5.75
V
2,3
All Other Inputs
0 to 3.6
V
4
Die-Junction Temperature
TJ
0 to 105
C
Notes:
1. These are the recommended and tested operating conditions. Proper device operation outside of these
conditions is not guaranteed.
2. PCI pins are designed to withstand LVdd + 0.5 V dc when LVdd is connected to a 5.0V dc power supply.
3. PCI pins are designed to withstand LVdd + 0.5 V dc when LVdd is connected to a 3.3 V dc power supply.
Cautions:
4. Input voltage (VIN) must not be greater than the supply voltage (Vdd/AVdd/LAVdd) by more than 2.5 V at
all times including during power-on reset.
5. OVdd must not exceed Vdd/AVdd/LAVdd by more than 1.8 V at any time including during power-on
reset.
6. Vdd/AVdd/LAVdd must not exceed OVdd by more than 0.6 V at any time including during power-on
reset.
7. BVdd/GVdd must not exceed Vdd/AVdd/LAVdd by more than 1.8 V at any time including during power-
on reset.
8. LVdd must not exceed Vdd/AVdd/LAVdd by more than 5.4 V at any time including during power-on reset.
9. LVdd must not exceed OVdd by more than 3.6 V at any time including during power-on reset.
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