參數(shù)資料
型號: MPC106ARX66CG
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, CBGA304
封裝: 21 X 25 MM, 3.16 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-304
文件頁數(shù): 16/32頁
文件大?。?/td> 451K
代理商: MPC106ARX66CG
Tsi106 PowerPC Host Bridge Hardware Specifications Manual
23
80C1000_MA002_02
Pinout Listings
STOP
A9
Low
I/O
TRDY
B9
Low
I/O
Interrupt, Clock, and Power Management Signals
CKO
(DWE2)
L11
High
Output
HRST
L16
Low
Input
NMI
E15
High
Input
QACK
L14
Low
Output
QREQ
H16
Low
Input
SYSCLK
L6
Clock
Input
SUSPEND
H14
Low
Input
Test/Configuration Signals
PLL[0–3]
U11, T11, U12, T12
High
Input
TCK
F13
Clock
Input
TDI
B13
High
Input
TDO
E12
High
Output
TMS
D14
High
Input
TRST
H13
Low
Input
Power and Ground Signals
AVdd
K9
High
Clock
Power
LSSD_MODE 2
G11
Low
Input
Vdd
E10, E6, F11, F5, F7, G10, G12, G6, H5, H7, K10, K7, L12, M11,
M5, M7, N10, N12, N6, P11, P5, P7, R10, R6, J8, L8
High
Power
Vss
E11, E7, F10, F12, F6, G5, G7, H12, H6, J7, L7, M10, M12, M6,
N11, N5, N7, P10, P12, P6, R11, R7, K8, J9, L9
Low
Ground
NC
H8, H9, M8, M9
Note:
1 All PCI signals are in little-endian bit order.
2 This test signal is for factory use only. It must be pulled up to Vdd for normal device operation.
Table 10. Pinout Listing (Continued)
Signal Name
Pin Number
Active
I/O
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