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參數(shù)資料
| 型號(hào)： | MM908E621ACDWB |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror |
| 中文描述： | 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡 |
| 文件頁數(shù)： | 24/62頁 |
| 文件大?。?/td> | 540K |
| 代理商： | MM908E621ACDWB |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
24
908E621
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
908E621 ANALOG DIE MODES OF OPERATION
The 908E621 offers three operating modes: Normal (Run),
Stop, and Sleep. In Normal mode the device is active and is
operating under normal application conditions. The Stop and
Sleep modes are low power modes with wake-up capabilities.
The different modes can be selected by the STOP and
SLEEP bits in the System Control Register.
Figure 11
describes how transitions are done between the
different operating modes and
Table 6
, page
26
, gives an
overview of the operating modes.
Figure 11. Operating Modes and Transitions
Normal Mode
This Mode is normal operating mode of the device, all
functions and power stages are active and can be enabled/
disabled. The voltage regulator provides the +5V V
DD
to the
MCU.
After a reset (e.g. Power On Reset, Wake-Up from Sleep)
the MCU has to set the PSON bit in the System Control
Register within 80ms typical (t
NORMREQ
), this is to ensure the
MCU has started up and is operating correctly. If the PSON
bit is not set within the required time frame the device is
entering SLEEP mode to reduce power consumption (fail
safe).
This MCU monitoring can be disabled e.g. for
programming by applying V
DD
on the TESTMODE terminal.
Stop Mode
In Stop mode the voltage regulator still supplies the MCU
with V
DD
(limited current capability). To enter the Stop mode
the STOP bit in the System Control Register has to be set
and the MCU has to be stopped also (see 908EY16
datasheet for details).
Wake-up from this mode is possible by LIN bus activity or
the wake-up input L0 and is maskable with the LINIE and/or
L0IE bits in the Interrupt Mask Register. The analog die is
generating an interrupt on
IRQ_A
terminal to wake-up the
MCU. The wake-up / interrupt source can be evaluated with
the L0IF and LINIF bits in the Interrupt Flag Register.
RESET
Power
Down
Power Up
Normal
Request
V
DD
High and Reset Delay (t
RST
) expired
NORMAL
SLEEP
Wake-Up (Reset)
STOP
Reset (LVR, ext. Reset, (HTR))
SLEEP Command
S
W
P
V
DD
Low
Reset (LVR, HTR, WDR, ext. Reset)
Reset (LVR, ext. Reset)
T
PSON = 0 and Normal Request
timeout (t
NORMREQ
) expired
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM908E621ACDWB/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror |
| MM908E621ACDWBR2 | 功能描述:8位微控制器 -MCU QUAD HB / TRIPLE HS 841B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEK | 功能描述:8位微控制器 -MCU QUAD H-B/3-HS W/MCU & LI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E621ACPEKR2 | 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MM908E622 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror |
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