參數(shù)資料
型號(hào)： MM908E621ACDWB
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述： 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡
文件頁數(shù)： 21/62頁
文件大小： 540K
代理商： MM908E621ACDWB
Analog Integrated Circuit Device Data
Freescale Semiconductor
21
908E621
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 908E621 was designed and developed as a highly
integrated and cost-effective solution for automotive and
industrial applications. For automotive body electronics, the
908E621 is well suited to perform complete mirror control via
a three-wire LIN bus.
This device combines an HC908EY16 MCU core with
flash memory together with a
SmartMOS
IC chip. The
SmartMOS
IC chip combines power and control in one chip.
Power switches are provided on the
SmartMOS
IC
configured as half-bridge outputs and three high-side
switches. Other ports are also provided, which include one
Hall-effect sensor input port, one analog input port with a
switched current source, one wake-up terminal, and a
selectable HVDD terminal. An internal voltage regulator
provides power to the MCU chip.
Also included in this device is a LIN physical layer, which
communicates using a single wire. This enables this device
to be compatible with three-wire bus systems, where one wire
is used for communication, one for battery, and one for
ground.
FUNCTIONAL TERMINAL DESCRIPTION
See
Figure 2, 908E621 Simplified Internal Block Diagram
,
page
2
, for a graphic representation of the various terminals
referred to in the following paragraphs. Also, see the terminal
diagram on
page 3
for a depiction of the terminal locations on
the package.
PORT A I/O TERMINALS
These terminals are special-function, bidirectional I/O port
terminals that are shared with other functional modules in the
MCU. PTA0:PTA4 are shared with the keyboard interrupt
terminals, KBD0:KBD4.
The PTA5/SPSCK terminal is not accessible in this device
and
is internally connected to the SPI clock terminal of the
analog die.
The PTA6/
SS
terminal is not accessible in this device and
is internally connected to the SPI slave select input of the
analog die.
For details refer to the 68HC908EY16 datasheet.
PORT B I/O TERMINALS
These terminals are special-function, bidirectional I/O port
terminals that are shared with other functional modules in the
MCU. All terminals are shared with the ADC module.
PTB0/AD0 is internally connected to the ADOUT terminal
of the analog die, allowing diagnostic measurements to be
calculated; e.g., current recopy, V
SUP
, etc.
The PTB1/AD1, PTB2/AD2, PTB6/AD6/TBCH0, PTB7/
AD7/TBCH1 terminals are not accessible in this device.
For details refer to the 68HC908EY16 datasheet.
PORT C I/O TERMINALS
These terminals are special-function, bidirectional I/O port
terminals that are shared with other functional modules in the
MCU.
For example, PTC2:PTC4 are shared with the ICG
module.
PTC0/MISO and PTC1/MOSI are not accessible in this
device and are internally connected to the MISO and MOSI
SPI terminals of the analog die.
For details refer to the 68HC908EY16 datasheet.
PORT D I/O TERMINALS
PTD0/TACH0/BEMF and PTD1/TACH1 are special-
function, bidirectional I/O port terminals that can also be
programmed to be timer terminals.
PTD0/TACH0 terminal is internally connected to the PWM
input of the analog die and only accessible for test purposes
(can not be used in the application).
For details refer to the 68HC908EY16 datasheet.
PORT E I/O TERMINAL
PTE0/TXD and PTE1/RXD are special-function,
bidirectional I/O port terminals that can also be programmed
to be enhanced serial communication.
PTE0/TXD is internally connected to the TXD terminal of
the analog die.
The connection for the receiver must be done
externally.
PTE1/RXD is internally connected to the RXD terminal of
the analog die and only accessible for test purposes (can not
be used in the application).
For details refer to the 68HC908EY16 datasheet.
EXTERNAL INTERRUPT TERMINAL (
IRQ
)
The
IRQ
terminal is an asynchronous external interrupt
terminal. This terminal contains an internal pullup resistor that
is always activated, even when the
IRQ
terminal is pulled
LOW.
For details refer to the 68HC908EY16 datasheet.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MM908E621ACDWB/R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror
MM908E621ACDWBR2 功能描述:8位微控制器 -MCU QUAD HB / TRIPLE HS 841B RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MM908E621ACPEK 功能描述:8位微控制器 -MCU QUAD H-B/3-HS W/MCU & LI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MM908E621ACPEKR2 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MM908E622 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-Bridge, Triple High-Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror
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