參數(shù)資料
型號: MM908E621ACDWB
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述: 綜合四半橋和三高的嵌入式微控制器和LIN高端側(cè)鏡
文件頁數(shù): 23/62頁
文件大?。?/td> 540K
代理商: MM908E621ACDWB
Analog Integrated Circuit Device Data
Freescale Semiconductor
23
908E621
FUNCTIONAL DESCRIPTION
FUNCTIONAL TERMINAL DESCRIPTION
INTERRUPT TERMINAL (
IRQ_A
)
IRQ_A
is the interrupt output terminal of the analog die
indicating errors or wake-up events. It is an open drain with
pullup resistor and must be connected to the
IRQ
terminal of
the MCU.
ADC SUPPLY/REFERENCE TERMINALS (VDDA/
VREFH AND VSSA/VREFL)
VDDA and VSSA
are the power supply terminals for the
analog-to-digital converter (ADC).
VREFH and VREFL are the reference voltage terminals for
the ADC.
The supply and reference signals are internally connected.
It is recommended that a high quality ceramic decoupling
capacitor be placed between these terminals.
For details refer to the 68HC908EY16 datasheet.
MCU POWER SUPPLY TERMINALS (EVDD AND
EVSS)
EVDD
and EVSS
are the power supply and ground
terminals. The MCU operates from a single power supply.
Fast signal transitions on MCU terminals place high, short-
duration current demands on the power supply. To prevent
noise problems, take special care to provide power supply
bypassing at the MCU.
For details refer to the 68HC908EY16 datasheet.
TEST MODE TERMINAL (TESTMODE)
This terminal is for test purpose only. In the application this
terminal has to be forced to GND.
For Programming/Test this terminal has to be forced to
VDD to bring the analog die into Test mode. In Test mode the
Reset Time-out (80ms) is disabled and the LIN receiver is
disabled
NOTE: After detecting a RESET (internal or external) the
PSON bit needs to be set within 80ms. If not the device will
automatically enter sleep mode.
MCU TEST TERMINAL (FLSVPP)
This terminal is for test purposes only. This terminal should
be either left open (not connected) or can be connected to
GND.
NO CONNECT TERMINALS (NC)
The NC terminals are not connected internally.
Note:
Each of the NC terminals can be left open or
connected to ground (recommended).
EXPOSED PAD TERMINAL
The exposed pad terminal on the bottom side of the
package conducts heat from the chip to the PCB board. For
thermal performance the pad must be soldered to the PCB
board. It is recommended that the pad be connected to the
ground potential.
4,7μF
0,1μF
VDDA/VREFH
EVDD
EVSS
VSSA/VREFL
VDD
VSS
μC
Analog
Die
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MM908E621ACDWB/R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Quad Half-bridge and Triple High Side with Embedded MCU and LIN for High End Mirror
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MM908E621ACPEKR2 功能描述:8位微控制器 -MCU QUAD HB AND TRIPLE HS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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