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參數(shù)資料
| 型號(hào)： | MM24128-BRBN6T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | EEPROM |
| 英文描述： | 256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| 中文描述： | 一百二十八分之二百五十六千位串行總線EEPROM，帶有集成電路芯片啟用三線 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 117K |
| 代理商： | MM24128-BRBN6T |
M24256-B, M24128-B
6/19
Figure 5. Write Mode Sequences with WC=1 (data write inhibited)
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
WC
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01120B
PAGE WRITE
(cont’d)
WC (cont’d)
S
DATA IN N
ACK
ACK
ACK
NO ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
NO ACK
that is the most significant memory address bits
(b14-b6 for the M24256-B and b13-b6 for the
M24128-B) are the same. If more bytes are sent
than will fit up to the end of the row, a condition
known as ‘roll-over’ occurs. Data starts to become
overwritten (in a way not formally specified in this
data sheet).
The master sends from one up to 64 bytes of data,
each of which is acknowledged by the memory if
the WC pin is low. If the WC pin is high, the con-
tents of the addressed memory location are not
modified, and each data byte is followed by a
NoAck. After each byte is transferred, the internal
byte address counter (the 6 least significant bits
only) is incremented. The transfer is terminated by
the master generating a STOP condition.
When the master generates a STOP condition im-
mediately after the Ack bit (in the “10
th
bit” time
slot), either at the end of a byte write or a page
write, the internal memory write cycle is triggered.
A STOP condition at any other time does not trig-
ger the internal write cycle.
During the internal write cycle, the SDA input is
disabled internally, and the device does not re-
spond to any requests.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM24128-BRDL5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| MM24128-BRDL6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| MM24128-BREA5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| MM24128-BREA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| MM24128-BRMN5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
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